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Set DMA mode to non-chaining
Set up transfer parameters
Transfer Size (byte count) Register
Setting the Enable and Go bits in the DMA
Command/Status Register initiates the DMA transfer
3.12.7.2
DMA Chaining Mode
In chaining mode, software constructs a list, or chain, of DMA operations in local memory and writes to
the Command/Status Register to begin the transfers. The PCI 9060 loads the DMA registers with
information from the first descriptor block in the chain, performs the transfer, proceeds to the next
descriptor. The PCI 9060 can be programmed to interrupt the processor at the end of any transfer, at the
end of the chain, or not at all. This is a very efficient way to move blocks of non-contiguous memory
across the PCI bus while minimizing processor involvement.
Rather than programming the DMA registers directly in chaining mode, values for the PCI Address,
Local Bus Address, Transfer Count, and Mode registers are stored in a descriptor block in memory.
New register values are loaded at the beginning of every transaction, until the last descriptor block is
processed.
The descriptor blocks must be quadword aligned and consist of five longwords (see Figure 3-7). The
longwords in each descriptor block are loaded into the PCI Address, Local Bus Address, Transfer
Count, Mode, and Next Descriptor registers, in that order. The first block is loaded into the PCI 9060
automatically when the transfer begins. The last block of a chained transfer should have the End of
Chain bit set in the Mode Register.
Once the descriptor blocks are set up, the i960 processor initiates the chaining transfer by writing the
first descriptor address to the Next Descriptor Address Register, and then setting the appropriate channel
control bit in the DMA Command/Status Register. Code should ensure that the channel enable bit for
the channel in use is set before starting a transfer.
Mode Register
PCI Address Register
Local Address Register
Descriptor Pointer Register
(set direction only)
Command/Status Register
Figure 3-6. Non-Chaining DMA Initialization
HARDWARE REFERENCE
PCI Host Memory
Memory Block
to Transfer
Local Memory
Memory Block
to Transfer
3-33
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