JVC SR-DVM70AG Schematic Diagrams page 26

DV MAIN(DV PRE/REC) SCHEMATIC DIAGRAM
5
HID3
PB_H
TO DV MSD
SHEET 17
REC_H
HID1
R4039
220
R4040
75
Q4003
Q4004 2SC4083/NP/
2SC4083/NP/
4
C4067
0.1
L4013 C4066
0.47µ 56p
R4041
R4042 470
1k
REC_CTL
PB_ENV
VREF_1.1
AGC_OUT
TO DV MAIN
VRB_AGC
SHEET 18
VRB_ATF
ATF_IN
D_REG_3V
3
REF_CLK
REC_CLK
REC_DATA
ATF_GAIN
AGC_GAIN
TO DV I/O
SHEET 19
DUMP_CTL
RECCADJ
2
TO DV MSD
SHEET 17
MONI_CHG
TO DV MAIN
SHEET 18
REG_5V
1
A_REG_3V
TO REG
SHEET 16 REG_2.5V
GND
A
L4005 10µ
C4013
0.1
L4011 10µ
R4038
C4054 C4051
470
12p
C4052
R4036 R4033 0.01
470
33k
R4024
R4031
33k
C4053
C4062 C4061
Q4002
0.1 10
C4065 R4025
2SC4083/NP/
0.1
R4037
C4032
12k
C4063 220p
0.1
L4012
0.47µ
R4026
R4034 R4032
C4064
680 15k
10p
R4043
R4035 12k
C4036
C4038
C4041
C4046
0.1
B C
C4015
22
C4014
R4022
0.1
470
C4030 C4029 C4028
0.047 0.047 0.047
Q4001
1k
12p
R4023
470
C4031
C4033 0.1
0.1
C4034
1000p
C4035
0.1
56
IC4001
0.1
4.7
C4039
0.1
C4040
0.1
4.7
C4021
K4001 0.1
R4021 0Ω
C4025
0.1
C4022 R4001
0.047
C4047
0.1
470
C4024
0.022
IC4002
R4002
100K
L4003 10µ
L4002 10µ
L4001 10µ
C4001 C4002 C4003 C4009 C4005 C4006
0.1 0.1 22 0.1 0.1 0.1
D E
2-47 2-48
5 0 DV MAIN(DV PRE/REC)
C4026
0.1
C4027
0.1
R4009
4.7K
R4008
R4010 22K 22k
R4007
240
R4006
240
R4005
240
R4004
240
C4007 C4010 C4011
22 0.1 22
F
CN4001
ZP401-8
ZP401-7
ZP401-6
ZP401-5
ZP401-4
ZP401-3
ZP401-2
ZP401-1
p20455001a_rev0
SHEET 22
G