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DV MAIN(DV I/O) SCHEMATIC DIAGRAM
Y_GCTL
C_GCTL
TO
DV_Y
DV VIDEO OUT
5
SHEET 20
DV_C
Y/V_IN
C_IN
µ
L3021
10
4
R3111
C3111
56k
0.1
R3113
22
C3112
47
R3112
47k
3
R3131
56k
C3121
R3133
REG_3V
0.1
µ
22
L3101
10
A_REG_5V
TO REG
SHEET 16
A_REG_5V
D_REG_3V
R3132
47k
C3102
C3103
0.1
47
2
ZP351-6
ZP351-4
1
TO REG
GND
SHEET 16
A
R3102
1k
C3022
C3021
0.1
47
Q3101
Q3102
R3103
330
R3120
R3115
C3113
680
R3114
820
22p
R3118
680
47k
R3116
C3117
Q3111
10K
L3111
µ
L3112
µ
4.7
15
15
C3118
C3114
C3115
C3116
8p
22p
22p
R3117
R3119
2.2k
56k
R3122
820
R3121
820
Q3115
R3140
C3123
12p
R3134
R3135
820
R3138
680
47k
C3127
0.1
R3136
L3131
µ
L3132
µ
18k
Q3131
15
15
C3128
C3124
C3125
C3126
R3137
R3139
8p
2.2k
39k
Q3135
ZP351-8
LC3101
K3101
R3165
100
C3140
C3141
0.1
0.1
IC3101
B
C
µ
L3151
10
µ
L3022
10
C3012
C3131
0.1
C3011
22
22
R3105
1k
C3101
0.1
R3079
2.7k
R3008
R3106
1.5k
270
C3001
0.1
R3003
820
R3004
270
Q3112
R3005
100
C3002
0.1
C3003
0.1
Q3113
C3119
4.7
Q3114
C3004
0.1
R3123
270
R3125
R3124
330
470k
C3005
0.1
C3006
0.1
C3007
0.1
C3008
0.1
680
C3130
0.1
Q3132
Q3133
µ
L3001
10
C3018
C3129
0.1
22
R3142
1.2K
R3143
R3141
270
820
µ
L3104
10
µ
L3103
10
C3106
22
C3109
0.1
C3108
C3107
22
0.1
R3164
100
IC3102
R3163
1M
R3161
1M
C3144
0.1
R3162
100
X3101
27MHz
C3143
C3142
12p
12p
D
E
2-41
2-42
IC3151
C3132
0.1
C3014
0.1
C3013
0.1
IC3001
R3048
0Ω
5
0
DV MAIN(DV I/O)
F
AGC_GAIN
DUMP_CTL
TO DV PRE/REC
ATF_GAIN
SHEET 22
RECCADJ
EXT_IN_L
DAC_DATA
DAC_CLK
DAC_CS
TBC_VD
TO DV MSD
SHEET 17
R3049
TBC_RST
TBC_CS
TBC_CLK
TBC_SDI
TBC_SDO
R3050
TO DV MSD
SHEET 17
CLK27A
TO DV MAIN
SHEET 18
DYI3
DYI2
DYI1
DYI0
DCI3
DCI2
DCI1
DCI0
OUTV
OUTH
TO DV MAIN
DYO3
SHEET 18
DYO2
DYO1
DYO0
DCO3
FSPLLCTL
M_VCOCTL
DCO2
DCO1
DCO0
INV
INH
PBVCOCTL
p20453001a_rev0
SHEET 19
G
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