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Hardware Overview
6.2.7.1
PCIe Lane Configuration
Pins 1-2 will indicate to the Embedded Controller on the Compute Module how to
configure the Intel® 82801HM I/O Controller PCIe* controller and the carrier. The
jumper configuration can be over-ridden through BIOS, as described later in this
document.
When No Jumper is placed on pins 1-2, the lanes are configured as follows:
Lane 0 and 1 are connected to the PCIeX16 connector
Lane 2 is connected to the Mini-PCIe Port
Lane 3 is connected to the Flash-DIMM Connector J1201
When a jumper is placed on pins 1-2, the lanes are configured as follows:
Lane 2 and 3 are connected to the PCIeX16 to create a PCIeX4 configuration
6.2.7.2
SATA Lane Configuration
Pins 5-6 configure the destination of SATA Port 0.
When No Jumper is placed, SATA Port 0 is connected to SATA-0 on the carrier.
When a jumper is placed, SATA Port 0 is connected to the FLASH-DIMM Connector
J1201.
6.2.7.3
USB 5 Lane Configuration
Pin 7-8 configures the destination for USB-5.
When No Jumper is placed, USB-5 is available on header J1202.
When a jumper is placed, USB-5 is available on the FLASH-DIMM Connector J1201.
324421/ User Guide
PCI Express Config
N/C
SATA Configuration
USB5 Configuration
N/C
Figure 13 Lane Configuration Header
GND
1
2
3
4
GND
5
6
GND
7
8
GND
9
10
N/C
35
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