Default Configuration - Eeprom Start-Up Modes - Texas Instruments LMK05318EVM User Manual

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• Oscillators onboard:
– XO (Y1), Default: 48.0048 MHz, 3.3 V, LVCMOS, low-jitter, ±25-ppm stability
– XO (U10), Alternate: LMK61E2, 10 to 1000 MHz (I
±50-ppm stability
NOTE: The EEPROM image of the LMK05318 was custom programmed to demonstrate the default
configuration in
programmed devices.
DEVICE START-UP MODE
HW_SW_CTRL (JP19)
Jumper Setting
2
MCU I C/SPI (JP20)
Jumper Settings
GPIO1/SCS (S6)
Jumper Settings
GPIO2/SDO/FINC (S7)
Jumper Settings
XO Input
PRIREF and SECREF Clock Inputs
DPLL Clock Input Assignment
DPLL Clock Input Selection
PLL Mode
DPLL Loop Bandwidth
DPLL TDC Frequency
APLL1 VCO Frequency
APLL2 VCO Frequency
OUT[0:1] Output
OUT[2:3] Output
OUT[4] Output
OUT[5] Output
OUT[6] Output
OUT[7] Output
PRIREF and SECREF
Frequency Detector Thresholds
PRIREF and SECREF
Window Detector Thresholds
DPLL Frequency Lock
Detector Thresholds
STATUS0 Output
STATUS1 Output
(1)
Clock input frequency thresholds (ppm) are relative to the frequency accuracy of the XO input.
SNAU236A – June 2018 – Revised December 2018
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Table 3, which is different from the EEPROM image of generic factory-
Table 3. Default Configuration - EEPROM Start-Up Modes
EEPROM + I
(HW_SW_CTRL = 0)
Tie pins 1-2, 3-4, 11-12 and 13-14
MCU I
S6[1] = OFF, S6[2:3] = ON
GPIO1 = 0: I
S7[1] = OFF, S7[2:3] = ON
Not used by default
(1)
Copyright © 2018, Texas Instruments Incorporated
2
C-programmable), 3.3 V, Differential, low-jitter,
2
C MODE
Tie pins 2-3
2
C interface to DUT
2
C Address = 0x64h
48.0048-MHz DIFF or LVCMOS
(On-chip termination disabled)
25-MHz DIFF or LVCMOS
(On-chip termination disabled)
PRIREF, SECREF
(Highest to lowest priority order)
Manual Fallback mode with Pin Select
DPLL Mode with APLL2 disabled
100 Hz
25 MHz
2500 MHz
n/a (APLL2 disabled)
156.25 MHz AC-LVPECL (from APLL1)
156.25 MHz AC-LVPECL (from APLL1)
156.25 MHz AC-LVPECL (from APLL1)
156.25 MHz AC-LVPECL (from APLL1)
156.25 MHz AC-LVPECL (from APLL1)
156.25 MHz HCSL (from APLL1)
(On-chip termination disabled)
Not Enabled
33.6 ns (Early) < Valid REF Input Period < 46.4 ns (Late)
DPLL Locked < 1 ppm, DPLL Unlocked > 10 ppm
DPLL Loss of Lock (active high)
DPLL Holdover Active (active high)
EVM Quick Start
EEPROM + SPI MODE
(HW_SW_CTRL = Float)
Tie pins 2-4 (open)
Tie pins 7-8, 9-10, 11-12, and 13-14
MCU SPI interface to DUT
S6[1] = OFF, S6[2:3] = ON
SPI SCS input to MCU
S7[1] = OFF, S7[2:3] = ON
SPI SDO output to MCU
LMK05318EVM User's Guide
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