JVC RX-DP10VBK Service Manual page 20

RX-DP10VBK/RX-DP10VSL
RX-DP10RSL
JCV8006 (IC635, IC640, IC645, IC650) : CC converter
1. Pin layout
VDD 49
FP1 50
FP2 51
WSN 52
WS 53
RAMT 54
VSS 55
CLK 56
VDD 57
DFR1 58
DFR2 59
DF1 60
DF2 61
DFSEL 62
SH 63
VSS 64
2. Pin function
Pin No. Pin name
1 VDD
2 BCK
3 DIN
4 LRCK
5 CAD1
6 CAD0
7 RESET
8 VSS
9 MODE
10 MCK/IW2N
11 MDT/IW1N
12 MLEN/IOF
13 BTR
14 D1W1
15 D1W2
16 VSS
17 VDD
18 TSTEN
19 F192
20 CKDV
l=CMOS, l1=Schmitt, lp2=Schmitt with pull-down resistor, O=CMOS
1-20
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
I/O
Function
-
Power supply : All VDD pins must be connected externally
l1
Bit clock input :Bit click if serial data into the DIN ; Must run continuously, "5V tolerant"
l1
Serial audio data input, "5V tolerant"
l1
Left/Right clock input ; sampling frequency (fs) for DIN ; Must run continuously, "5V tolerant"
lp2
Chip address 1 ; available on MODE=H
lp2
Chip address 0 ; available on MODE=H
l1
System reset ; the internal state is reset to the default setting when L, "5V tolerant"
-
Ground ; All VSS pins must be connected externally
lp2
System control mode select input : (H=Software mode ; L=Hardware mode)
l1
Control clock input ; MODE=H,
/Select input audio data word length input2 ; MODE=L, "5V tolerant"
l1
Control data input ; MODE=H,
/Select input audio data word length input 1 ; MODE=L, "5V tolerant"
l1
Control data latch input ; MODE=H,
/select input and output audio data format input ; MODE=L, "5V tolerant"
lp2
Select BIT-UP through mode input ; MODE=L
lp2
Select output 1 audio data word length and enable control 1 ; MODE=L
lp2
Select output 1 audio data word length and enable control 2 ; MODE=L
-
Ground ; All VSS pins must be connected externally
-
Power supply ; All VSS pins must be connected externally
lp2
Test control input ; in normal operation this pin should be terminated to ground
lp2
Select system clock for 192kHz input sampling frequency input : MODE=L,
(supported for FS-UP only)
lp2
Internal click divider select input ; MODE=L,(L=1, H=1/2)
VSS
TOUT6
TOUT7
TOUT8
TOUT9
TOUTA
TOUTD
VDD
TMD0
TMD1
CKSLN
PDN
CKDV
F192
TSTEN
VDD
(1/2)
(H=VDD, L=VSS)