Diagrams; Circuit Boards Location - Sony CDP-XE220 Service Manual

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Q Q
3 7 6 3 1 5 1 5 0
6. Check the level B of the oscilliscope's waveform and the A (DC
voltage) of the center of the Traverse waveform.
Confirm the following :
A/B x 100 = less than ± 7%
Traverse waveform
Center of the waveform
B
A (DC voltage)
0V
level : 500 ± 100 mVp-p
7. Press the "8" button. (The tracking servo is turned ON.) Confirm
the C (DC voltage) is almost equal to the A (DC voltage) is step
6.
Traverse waveform
0V
Tracking servo
Tracking servo
OFF
ON
8. Disconnect the lead wire of TP3 (ADJ) connected in step 1.
T E
L
1 3 9 4 2 2 9 6 5 1 3
[ MAIN BOARD ] — Component Side —
CN402
TP3 (JW41: ADJ)
TP2 (JW40: AF ADJ)
IC401
w w w
.
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Adjustment Location :
[ BD BOARD ] — Side A —
(RF)
(VC)
(FOK)
IC101
(TEO)
(FEO)
C (DC
voltage)
x
a o
u 1 6 3
y
i
– 9 –
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8
9

6-1. CIRCUIT BOARDS LOCATION

LOADING board
POWER SW board
THIS NOTE IS COMMON FOR PRINTED WIRING
BOARDS AND SCHEMATIC DIAGRAMS.
(In addition to this, the necessary note is printed
Q
Q
3
7
6
3
1
5
1
in each block.)
For schematic diagrams.
Note:
• All capacitors are in µF unless otherwise noted. pF: µµF
50 WV or less are not indicated except for electrolytics
and tantalums.
• All resistors are in Ω and
1
/
W or less unless otherwise
4
specified.
¢
: internal component.
• C : panel designation.
Note: The components identified by mark ! or dotted line
with mark ! are critical for safety.
Replace only with part number specified.
• U : B+ Line.
• V : B– Line.
• H : adjustment for repair.
• Voltages and waveforms are dc with respect to ground
under no-signal (detuned) conditions.
no mark : STOP
(
) : PLAY
: can not to be measured
• Voltages are taken with a VOM (Input impedance 10 MΩ).
Voltage variations may be noted due to normal produc-
tion tolerances.
• Waveforms are taken with a oscilloscope.
Voltage variations may be noted due to normal produc-
tion tolerances.
• Circled numbers refer to waveforms.
• Signal path.
J
: CD
c : digital out
For printed wiring boards.
c o
Note:
• X : parts extracted from the component side.
.
• Y : parts extracted from the conductor side.
p
: parts mounted on the conductor side.
®
: Through hole.
• b : Pattern from the side which enables seeing.
(The other layers' patterns are not indicated.)
SECTION 6

DIAGRAMS

2
4
2
9
8
BD board
PANEL board
WAVEFORMS
– CD SECTION –
1
5
5
0
8
9
2
4
9
8
2
1.3Vp-p
500mV/DIV, 500nsec/DIV
IC101 #£ RFO
6
2
0.5Vp-p
200mV/DIV, 1µsec/DIV
IC101 2 FEI
3
7
0.2Vp-p
50mV/DIV, 1msec/DIV
IC101 $¶ TEI
4
8
7.8µsec
2.5Vp-p
IC103 @¶ MDP
– PANEL SECTION –
m
1
4.2Vp-p
4MHz
IC501 #¡ EXTAL
– 10 –
9
9
MAIN board
9
9
230µsec
5Vp-p
IC103 ^º XPCK
135µsec
5Vp-p
IC103 ^™ RFCK
135µsec
5Vp-p
IC103 &¢ WFCK
2.6Vp-p
16.9344MHz
IC103 *ª XTAI

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