Epson E0C6001 Technical Manual page 126

PCP3
Fig. 3.8.4
Assignment of the
interrupt vector
address
CHAPTER 3: PERIPHERAL CIRCUITS (Interrupt and Halt)
• Interrupt vector address
The E0C6001 interrupt vector address is made up of the
low-order 2 bits of the program counter (12 bits), each of
which is assigned a specific function as shown in Figure
3.8.4.
PCP2 PCP1 PCP0
0 0 0 1
Input (K00–K03) interrupt
Note that all of the three timer interrupts have the same
vector address, and software must be used to judge whether
or not a given timer interrupt has occurred. For instance,
when the 32 Hz timer interrupt and the 8 Hz timer interrupt
are enabled at the same time, the accepted timer interrupt
must be identified by software. (Similarly, the K00–K03
input interrupts must be identified by software.)
When an interrupt is generated, the hardware resets the
interrupt flag (I) to enter the DI state. Execute the EI in-
struction as necessary to recover the EI state after interrupt
processing.
Set the EI state at the start of the interrupt processing
routine to allow nesting of the interrupts.
The interrupt factor flags must always be reset before set-
ting the EI status in the corresponding interrupt processing
routine. (The flag is reset when the interrupt condition flag
is read by software.)
PCS7 PCS6 PCS5 PCS4
0 0 0 0
Clock timer interrupt
PCS3 PCS2 PCS1 PCS0
× 0 ×
0
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