Denon AVR-X1200W Service Manual page 133

MC14094BDTR2G (DIGITAL_MCU : IC753)
Block diagram
Clock
2
*
SERIAL
DATA IN
15
*
Z = High Impedance
2
* At the positive clock edge, information in the 7th shift register stage is transferred to Q8 and Q
OUTPUT
ENABLE
3
4
ORDERING INFORMATION
5
Device
6
MC14094BCPG
7
MC14094BDG
MC14094BDR2G
8
NLV14094BDR2G*
MC14094BDTR2G
NLV14094BDTR2G*
3
*
CLOCK
MC14094BFELG
1
*
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
STROBE
Specifications Brochure, BRD8011/D.
*NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP
Capable.
Terminal Functions
Symbol
Q1 HPD1
Q2 HPD2
Q3 HPD3
Q4 HPD4
Q5 HPD5
Q6 HPD6
Q7 VIN A
Q8 VIN B
3−STATE TEST CIRCUIT
PIN ASSIGNMENT
FOR t AND t
STROBE
PHZ
DATA
CLOCK
O.E.
Q1
DATA
Q2
ST
Q3
CLOCK
Q4
V
SS
BLOCK DIAGRAM
Output
Enable REGISTER STAGE 1
Strobe
CLOCK CLOCK
0 X
0 X
CLOCK 1 0 CLOCK
1 1
1 1
CLOCK CLOCK
1 1
X = Don't Care
REGISTER STAGE 2
REGISTER STAGE 3
REGISTER STAGE 4
REGISTER STAGE 5
REGISTER STAGE 6
REGISTER STAGE 7
REGISTER STAGE 8
CLOCK CLOCK
CLOCK
CLOCK
*Input Protection Diodes
STROBE
STROBE
Lv
I/O Pu/Pd STBY STOP
Cnv
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http://onsemi.com
MC14094B
MC14094B
FOR t AND t
1 16 V
PZH PLZ PZL
DD
V V
OUTPUT
SS DD
2 15
ENABLE
R1 = 1 k = t
3 14 Q5 PHL
R1 = 10 k = t
PHZ
4 R1 13 Q6
5 12 Q7
OUTPUT
50 pF
6 11 Q8
7 10 Q'
S
Figure 1.
8 9 Q
S
TRUTH TABLE
Parallel Outputs
Q1 LATCH 1 Q
Data
N
STROBE
X Z Z
X Z Z
X No Chg. STROBE STROBE No Chg.
−1
0 0 Q
N
−1
1 1 Q
STROBE
N
1 No Chg. No Chg.
LATCH 2
LATCH 3
LATCH 4
LATCH 5
Package
LATCH 6
PDIP−16
(Pb−Free)
LATCH 7
SOIC−16
(Pb−Free)
SOIC−16
LATCH 8
(Pb−Free)
CLOCK
STROBE STROBE
TSSOP−16
(Pb−Free)
CLOCK
SOEIAJ−16
(Pb−Free)
CEC
STBY
L L
L Hot-Plug-Detect (HDMI) control pin
L L L Hot-Plug-Detect (HDMI) control pin
L L L Hot-Plug-Detect (HDMI) control pin
L L
L Hot-Plug-Detect (HDMI) control pin
L L
L Hot-Plug-Detect (HDMI) control pin
L L L Hot-Plug-Detect (HDMI) control pin
L L L COMPOSITE VIDEO SELECT IC(NJM2595) control pin
L L L COMPOSITE VIDEO SELECT IC(NJM2595) control pin
5
2
133
, t
PLH
, t , t , t
PZH PLZ PZL
Serial Outputs
Q * 3-STATE BUFFER 1 Q'
S S
V
Q7 No Chg.
DD
No Chg. Q7
Q7 No Chg.
Q7 No Chg.
Q7 No Chg.
No Chg. Q7
3-STATE BUFFER�2
.
S
3-STATE BUFFER�3
3-STATE BUFFER�4
3-STATE BUFFER�5
Shipping
3-STATE BUFFER�6
500 Units / Rail
3-STATE BUFFER�7
48 Units / Rail
2500 Units / Tape & Reel
3-STATE BUFFER�8
2500 Units / Tape & Reel
CLOCK
2000 Units / Tape & Reel
CLOCK
Function
4 Q1
5 Q2
6 Q3
7 Q4
14 Q5
†
13 Q6
12 Q7
11 Q8
10 Q'
S
9 Q
S