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O IC BLOCK DIAGRAM AND TERMINAL FUNCTION OF IC'S
' oA01
TDA1315 DAIO
lsser-
r€C
INTPUÍ
s€L.
rcint RCfl Vroí VOOA VSSA SYSCLXO SYSCLÍ|
Pin name
type
padc ell
clescrlptlon
3
47n7
4
41/ ÍE
6
5
7
I
9
35
37
36
u
33
38
32
21
rO
3Ít
rA
u
1
2
26
á
21
8
2,
27
12
30
16
13
11
15
n
31
19
n
a
t0
1 1
VODA
vo o o l/2
VSSA
vs sol /2
rECrN0
rE c rN l
IECSEL
IECOUT
IECOUTEN
SO
SCK
WS
SDAUX
I2SSEL
I2SOUTEN
MUTE
CTRLMOO
SYSCLKO
SYSCLKI
CLKSEL
RCint
RCÍil
Vreí
STFCEE
LOATA
LCLK
LMOOE
LADOR
UDAVAIL
UNLOCK
INVALIO
CHMOOE
FS32
FS44
FS48
COPY
DEEM
RESET
PWFIOWN
TESTA
TESTB
TESTC
I
I
I
o
I
uo
vo
vo
I
I
I
I
o
I
I
AÍt
An.
An.
I
vo
I
I
I
o
o
vo
o
o
o
o
o
o
I
I
I
I
I
8008
E008
E004
E009
IPP04
E029
IUP04
OPFH3
IUPO4
JOF24
roF29
roF24
IP PO4
IU PO 4
IUPO4
IUP04
IUP04
OPFA3
IPP09
IUP04
E029
E029
Ê029
IDPO4
lOF2/t
lPP09
IPP09
IPP04
OPF23
OPP4l
roo24
OPP4l
OPP41
OPP4l
OPP41
OPP41
OPF23
toP0 9
IPP 0 4
IPP 0 4
IPP04
IPP 0 4
positive supply voltage (analogue part)
poslllve supply voltage (dlgital part)
powsr supply return (analogue grouncl)
powsÍ supply r€turn (dlgital ground)
TTL-level IEC input
high-sensltlvlty IEC Input
select IEC input 0 or 1
(0-l EC l N O, 1-l EC lN l) .
lhls Input has an Internal pull-up reslstor
cligital audio output Íor optlcal and transÍormer llnk
digital audlo output enable
(0 - enabl€d. I
- dlsabled/trlslate),
this input has an Internal pull-up reslstoí
serial audlo data (l2S)
serlal audio clock (l2S)
word select (l2S)
auxlliary serial Oata lnput (l2S)
select auxillary Input or normal Input In transmlt mode
(0-S OAU X, I-SD ) ,
this Input has an internal pull-up reslstor
sgrlal audlo output enabl€
(0 - onsbled, | - disablecl/trlstate),
this input has an Internal pull-up reslstor
aucllo mute
(Q - p€Ímànent mute, 1 - mule on recelve error),
this input has an internal pull-up íesistor
select ínrcropÍocessor/stand-alone mode
(0 - microprocessor. 'l
- StSnd-alonel.
this input has an internal pull-uO Íesrstor
sysiem clock output (in receive mode)
system clock input (in transmit mocte)
select system clock (256 / 384' ís)
(0 -384'ÍS.
1-256'Íg),
this input lus an internal pull-up resistor
pin Íor integrating capacitor
pin Íor PLL loop íilter
pin Íor clecoupling oí intemal reÍerence voltage
strobe íor control register (active high)
this input tus an internal pult-ctown resistor
!P interíace clata line
po interíace ctock line
uP inteÍíace mode tine
pP interíace address switch
(0-000001.1- 000010),
synchronization Íor user data
(0
- clata available, 1 - no ctata)
PLL out-oÍ-lock
(0
- not locked. 1 - locked).
this output can clrive a LED
vali<lily oÍ audio sampte
(0
- valid sample. 1 - invalid sample)
this pin has an internal pull-down rdsistor
usage oí channel status block
(0
-
proÍessional use, 1
- consumer use)
this output can díive a LEO
inclicates sample Írequency
- 32 kHz (active tow)
this output can drive a LED
inclicates sample írequencï
- 44.1 kHz (active low)
this output can clíive a LED
indicates sample Írequency
- 48 kHz (active low)
this output can drive a LED
copyright slstus bit (0 - copyright asserted. 1
- oo copyright asserted)
this output can drive a LED
p re -em phas is bi t
(0
- no pre-emphasis, 1 - with pre-emphasis)
initialization aíter power-on. requires only an extemal capacitor to voo
this is a schmitt trigger input with an internal puil-down resistor
enable power clown (stanctby mode)
(Q - normsl applicatioo, 1
- standby mocte)
enable íactory test
(0 - normêl applicatioo. 1
- test clock enabled)
enable ÍactoÍy test
(0
- normSl mOde, 1 - SCaÍl mOde)
enable Íactory test
(0 - noím3l applicatioÍt, 1
- observation outguts)
-5 6 -
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