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Pin
ID
1
IRIN
Receives Remote Control Inferred pulses.
2
SDA1
Serial Data Sent and Received from the EEPROM, A/V Selector, DAC1, DAC2.
Function of I2C.
3
SCL1
Serial Clock Synchronization Sent to the EEPROM, A/V Selector, DAC1,
DAC2. Function of I2C.
4
Dimmer
Receives DC voltage generated from the Photo Receiver on the Front Panel
monitoring Room Light. For AI
5
AD Key In Receives Level Shifted DC voltage from Front Panel Key presses.
6
Main/Sub
Receives the Main Tuner AFC or Sub AFC DC Voltage switched by I005. Used
AFC
during channel change.
7
Key In
When the Power switch is pressed, Clock data from pin 21 is routed through
Q014 back to this pin. Power is toggled On or Off.
8
Not Used Not Used
9
Not Used Not Used
10
Main FV
Receives Composite 1 V Sync from I015 pin 4 for OSD Positioning.
Det
11 Sub FV Det Receives Composite 2 V Sync from I016 pin 4 for OSD Positioning.
12 DSP Busy Receives the Busy command from the Digital Surround Processor on the
Surround PWB.
13
DSP SO
Control command to the DSP Unit for controlling Modes.
14
DSP Dir
Receives Digital Surround Processor Error information from the DSP unit on the
Surround PWB.
15
DSP SS
Control command to the DSP Unit for controlling Modes.
16 DSP SCK Digital Surround Processor Clock.
17
DSP S1
Control command to the DSP Unit for controlling Modes.
18 DSP ERR
Mutes Audio when a DSP Dir input is detected. (DSP Error).
Mute
19 DSP Reset Resets the DSP module on the Surround PWB
20
Clock
Sent to the Level Shift I014 then to both Tuners and the Flex Converter as a
timing signal. Also see pin 7.
21
Data
Sent to the Level Shift I014 then to both Tuners and the Flex Converter to
control each unit.
22
Comp 1/2
Either Component One or Two Horizontal Input from I005 through Q046. Used
FH Det
for OSD Display. And Auto Link
23
AC In
Receives Timing pulses for advancing the Clock. Received from the Smitt Amp
Q008 and Q009
24
Main/Sub
Station Detection. Used during Auto Programming and when channels are
SD Det
changed to open AFC Loop. Switched by I005.
25
VDD
Stby +3.3V generated by 0029. Main Microprocessor B+.
26
CHL
Clamp level High
27
VRefFHS Use as a reference signal within the Microprocessor High Frequencies.
28
CVBS0
Composite Sync used for Closed Caption Detection for the Main Tuner.
29
VSS
Ground
30
CVBS1
Not Used. Composite Sync used for Closed Caption Detection for the PinP
Tuner.
31
VREFLS
Reference Signal used within the Microprocessor Low Frequencies.
32
CLL
Internal function of the Microprocessor.
CIRCUIT DESCRIPTION
Function
Active
Data
Data
Data
DC
DC
DC
Data
N/A
N/A
Sync
Sync
DC
Data
Data
Data
Data
Data
DC High
DC High
Data
Data
DC
60Hz.
Sync
DC
DC
DC
Sync
N/A
N/A
N/A
N/A
48
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