Figure 24. System Dimm Population Layout - Intel R1000WF Technical Product Specification

Intel® Server System R1000WF Product Family Technical Product Specification
DIMM or factory installed DIMM blank while the system is in operation. Figure 24 identifies the memory slots,
identified with an arrow, which must be populated in all 1U system configurations.
The following memory population rules apply when installing DIMMs:
DIMM population rules require that DIMMs within a channel be populated starting with the blue DIMM
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slot or DIMM farthest from the processor in a "fill-farthest" approach.
When only one DIMM is used for a given memory channel, it must be populated in the BLUE DIMM
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slot (furthest from the CPU).
Mixing of DDR4 DIMM types (RDIMM, LRDIMM, 3DS RDIMM, 3DS, LRDIMM) within a channel socket or
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across sockets produces a Fatal Error Halt during memory initialization.
Mixing DIMMs of different frequencies and latencies is not supported within or across processor
•
sockets. If a mixed configuration is encountered, the BIOS will attempt to operate at the highest
common frequency and the lowest latency possible.
• When populating a quad-rank DIMM with a single- or dual-rank DIMM in the same channel, the quad-
rank DIMM must be populated farthest from the processor. Intel MRC checks for correct DIMM
placement. A maximum of eight logical ranks can be used on any one channel, as well as a maximum
of ten physical ranks loaded on a channel.
• The memory slots associated with a given processor are unavailable if the corresponding processor
socket is not populated.
• A processor may be installed without populating the associated memory slots, provided a second
processor is installed with associated memory. In this case, the memory is shared by the processors.
However, the platform suffers performance degradation and latency due to the remote memory.
Processor sockets are self-contained and autonomous. However, all memory subsystem support
•
(such as Memory RAS, Error Management) in the BIOS setup are applied commonly across processor
sockets.
• For multiple DIMMs per channel:
o For RDIMM, LRDIMM, 3DS RDIMM, and 3DS LRDIMM, always populate DIMMs with higher
electrical loading in slot1, followed by slot 2.

Figure 24. System DIMM population layout

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