Sony BDP-CX7000ES Service Manual page 91

Pin No. Pin Name
E7 PCICBEB1
E8, E9 PCIAD9, PCIAD3
E10 VODY3
E11 VODC0
VODC4, VODC2,
E12 to E14
VODC7
E15 AOHBD3
E16, E17 IPODC3, IPODC5
E18 SAVDDTIO
E19 SAVDDIG
E20 GPIO32
E21 GPIO23
E22 GPIO31
E23 GPIO26
E24 GPIO16
E25 GPIO15
E26 GPIO2
E27 GPIO1
E28 GND
E29 TMODE3
E30, E31 AO0BD1, AO0BD2
E32 AO1BD
E33 AO1MCK
F1 SYSXI
F2 GND
F3 PCIREQB0
F4 PCIIDSEL
F5 PCICBEB3
F6 PCIDEVSELB
F7 PCIAD13
F8 PCICBEB0
F9 PCIAD4
F10 VODY1
F11, F12 VODY8, VODY5
F13 VODC3
F14 VODC9
F15 IPODC1
F16 AOHBCK
F17 SAGNDANA
F18 SAVDDTIO
F19 SAVDDIG
F20 GPIO27
F21 GPIO30
F22 GPIO25
F23 GPIO24
F24 GPIO17
F25 GPIO12
F26 GPIO7
F27 VRVDD
F28 TMODE5
F29 TEST
F30 S2DOUT
F31 AO1LRCK
F32 AO1BCK
F33 VDD3
G1 SYSXO
G2 GND
PCIAD28, PCIAD26,
G3 to G8 PCIAD31, PCIAD15,
PCIAD16, PCIAD10
I/O
I/O Command and byte enable signal input/output with the USB interface
I/O Two-way address and data bus with the USB interface
O Digital video (Y) signal output to the digital video format converter
O Digital video (Cb/Cr) signal output terminal
O Digital video (Cb/Cr) signal output to the digital video format converter
O Audio signal output to the HDMI transmitter
I/O Not used
- Power supply terminal (+1.8V)
- Power supply terminal (+1.05V) (digital system)
I/O Not used
I Clock signal input terminal (for JTAG)
I/O Not used
I Reset signal input terminal (for JTAG)
O Reset signal output to the D/A converter
O Chip select signal output to the D/A converter
O Chip select signal output terminal
O Chip select signal output to the component interface
- Ground terminal
I Test terminal Not used
O Audio signal output to the D/A converter
O Audio signal output to the D/A converter
O Master clock signal output to the D/A converter
I System clock signal input terminal (27 MHz)
- Ground terminal
I Request signal input from the USB interface
I Initialization device selection signal input from the USB interface
I/O Command and byte enable signal input/output with the USB interface
I/O Device selection signal input/output with the USB interface
I/O Two-way address and data bus with the USB interface
I/O Command and byte enable signal input/output with the USB interface
I/O Two-way address and data bus with the USB interface
O Digital video (Y) signal output terminal
O Digital video (Y) signal output to the digital video format converter
O Digital video (Cb/Cr) signal output to the digital video format converter
O Digital video (Cb/Cr) signal output to the digital video format converter
I/O Not used
O Bit clock signal output to the HDMI transmitter
- Ground terminal (analog system)
- Power supply terminal (+1.8V)
- Power supply terminal (+1.05V) (digital system)
I Debug interrupt signal input terminal (for JTAG)
I Interrupt signal input from the USB interface
I Mode selection signal input terminal (for JTAG)
O Data output terminal (for JTAG)
O Audio muting on/off control signal output terminal
O Reset signal output to the FPGA, HDMI interface and component interface
I/O Not used
- Power supply terminal (+1.05V)
I Test terminal Not used
I Test terminal Not used
O Serial data output to the system controller
O L/R sampling clock signal output to the D/A converter
O Bit clock signal output to the D/A converter
- Power supply terminal (+3.3V)
O System clock output terminal (27 MHz)
- Ground terminal
I/O Two-way address and data bus with the USB interface
Description
Not used
Not used
Not used
"L": reset
Not used
No used
Not used
Not used
Not used
"L": muting on
BDP-CX7000ES
"L": reset
91