Sony BDP-CX7000ES Service Manual page 106

BDP-CX7000ES
VP-062EJ BOARD IC204 88DE2710 (DIGITAL VIDEO FORMAT CONVERTER)
Pin No. Pin Name
A1 GND
A2, A3 DT1[24], DT1[25]
A4 DT1_FD
A5 OSD_CKI
OSD[0], OSD[4],
A6 to A10 OSD[5], OSD[9],
OSD[12]
A11 OSD_HSO
A12 RESETZ
A13 TRST
A14 TMS
A15 C656VS
A16 C656FD
A17 C656DT[1]
A18 GND
DT1[20], DT1[22],
B1 to B3
DT1[26]
B4 DT1_VS
B5 YS
B6 OSD_HSI
OSD[3], OSD[8],
B7 to B10
OSD[10], OSD[13]
B11 OSD_CKO
B12 SDA
B13 TCK
B14 C656HS
B15 C656CK
B16 C656DT[0]
B17 GND
B18 C656DT[2]
C1 DT1[15]
C2, C3 DT1[18], DT1[21]
C4 DT1_HS
C5 DT1_CK
C6 OSD_VSI
OSD[1], OSD[6],
C7 to C10
OSD[11], OSD[15]
C11 OSD_VSO
C12 TEST
C13 TDO
C14 to C656DT[3], C656DT[4],
C17 C656DT[6], C656DT[7]
C18 DAC_CK
D1 DT1[13]
DT1[17], DT1[19],
D2 to D5
DT1[28], DT1[29]
D6 YM
OSD[2], OSD[7],
D7 to D9
OSD[14]
D10 SCL
D11 TDI
D12 C656DT[5]
D13 DAC_HS
D14 HDMI_FD
D15 DAC_FD
D16 DAC_VS
D17 GND
D18 HDMI_CK
DT1[10], DT1[12],
E1 to E3
DT1[14]
106
I/O
- Ground terminal
I Digital video signal input terminal
I Field ID signal input terminal
I Clock signal input terminal for OSD generator
I Serial data input terminal for OSD generator
O Horizontal sync signal output terminal for OSD generator
I Reset signal input from the BD decoder
I Reset signal input terminal (for JTAG)
I Mode selection signal input terminal (for JTAG)
O Vertical sync signal output to the FPGA
O Field ID signal output to the FPGA
O Digital video signal output to the FPGA
- Ground terminal
I Digital video signal input terminal
I Vertical sync signal input from the BD decoder
I Not used
I Horizontal sync signal input terminal for OSD generator
I Serial data input terminal for OSD generator
O Clock signal output terminal for OSD generator
I/O Two-way I2C data bus with the BD decoder
I Clock signal input terminal (for JTAG)
O Horizontal sync signal output to the FPGA
O 27 MHz clock signal output to the FPGA
O Digital video signal output to the FPGA
- Ground terminal
O Digital video signal output to the FPGA
I Digital video (Y) signal input from the BD decoder
I Digital video signal input terminal
I Horizontal sync signal input from the BD decoder
I Video clock signal input from the BD decoder
I Vertical sync signal input terminal for OSD generator
I Serial data input terminal for OSD generator
O Vertical sync signal output terminal for OSD generator
I Test mode setting terminal
O Data output terminal (for JTAG)
O Digital video signal output to the FPGA
O Clock signal output terminal for D/A converter
I Digital video (Y) signal input from the BD decoder
I Digital video signal input terminal
I Not used
I Serial data input terminal for OSD generator
I I2C clock signal input from the BD decoder
I Data input terminal (for JTAG)
O Digital video signal output to the FPGA
O Horizontal sync signal output terminal for D/A converter
O Field ID signal output terminal for HDMI transmitter
O Field ID signal output terminal for D/A converter
O Vertical sync signal output terminal for D/A converter
- Ground terminal
O Video clock signal output to the FPGA
I Digital video (Y) signal input from the BD decoder
Description
Not used
Not used
Not used
Not used
Not used
"L": reset
Not used
Not used
Not used
Not used
Not used
Not used
Not used
Not used
Not used
Not used
Not used
Not used
Not used
Not used
Not used
Not used
Not used
Not used
Not used
Not used