Sony TAV-L1 Service Manual page 133

MAIN BOARD IC505 CXD9862R (DSP)
Pin No. Pin Name
1
VSS
2
XRST
3 EXTIN
4
LRCKI3
5
VDDI
6
BCKI3
7 PLOCK
8
VSS
9
MCLK1
10
VDDI
11 VSS
12
MCLK2
13
MS
14
SCKOUT
15 LRCKI1
16
VDDE
17
BCKI1
18
SDI1
19 LRCKO
20
BCKO
21
VSS
22
KFSIO
23 SDO1
24
SDO2
25
SDO3
26
SDO4
27 SPDIF
28
LRCKI2
29
BCKI2
30
SDI2
31 VSS
32
HACN
33
HDIN
34
HCLK
35 HDOUT
36
HCS
37
GP12
38
GP13
39 GP14
40
VDDI
41
VSS
42
GP15
43 OE0
44
CS0
45
WE0
46
VDDE
I/O
-
Ground terminal
I
Reset signal input from the main system controller "L": reset
I Master clock signal input terminal Not used
I
L/R sampling clock signal input terminal Not used
-
Power supply terminal (+1.8V)
I
Bit clock signal input terminal Not used
O PLL lock signal output terminal Not used
-
Ground terminal
I
System clock input terminal (13.9 MHz)
-
Power supply terminal (+1.8V)
- Ground terminal
O
System clock output terminal (13.9 MHz)
I
Master/slave setting terminal "L": internal clock, "H": external clock Fixed at "L" in this set
O
Master clock signal output to the stream processor
I L/R sampling clock signal input from the digital audio interface receiver
-
Power supply terminal (+3.3V)
I
Bit clock signal input from the digital audio interface receiver
I
Audio serial data input from the digital audio interface receiver
O L/R sampling clock signal output to the stream processor
O
Bit clock signal output to the stream processor
-
Ground terminal
I
Audio clock signal input from the servo DSP or digital audio interface receiver
O Audio serial data output to the stream processor
O
Audio serial data output terminal Not used
O
Audio serial data output to the stream processor
O
Audio serial data output terminal Not used
O SPDIF signal output terminal Not used
I
L/R sampling clock signal input from the servo DSP or digital audio interface receiver
I
Bit clock signal input from the servo DSP or digital audio interface receiver
I
Audio serial data input from the servo DSP or A/D converter
- Ground terminal
O
Acknowledge signal output to the main system controllerr "L" active
I
Serial data input from the main system controller
I
Serial data transfer clock signal input from the main system controller
O Serial data output to the main system controller
I
Chip enable input from the main system controller "L" active
I
Write signal input from the main system controller
O
SD-RAM chip enable output terminal Not used
O Row address strobe signal output terminal Not used
-
Power supply terminal (+1.8V)
-
Ground terminal
O
Column address strobe signal output terminal Not used
O Output terminal of data input/output mask Not used
O
Chip select signal output to the S-RAM
O
Write enable signal output to the S-RAM
-
Power supply terminal (+3.3V)
Description
TAV-L1
133