Max 10 Fpga Device Overview; Key Advantages Of Max 10 Devices - Intel MAX 10 FPGA User Manual

Programmable device
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®
1 MAX
10 FPGA Device Overview
®
1 MAX
10 FPGA Device Overview
®
MAX
10 devices are single-chip, non-volatile low-cost programmable logic devices
(PLDs) to integrate the optimal set of system components.
The highlights of the MAX 10 devices include:
Internally stored dual configuration flash
User flash memory
Instant on support
Integrated analog-to-digital converters (ADCs)
Single-chip Nios II soft core processor support
MAX 10 devices are the ideal solution for system management, I/O expansion,
communication control planes, industrial, automotive, and consumer applications.
Related Links
MAX 10 FPGA Device Datasheet

1.1 Key Advantages of MAX 10 Devices

Table 1.
Key Advantages of MAX 10 Devices
Advantage
Simple and fast configuration
Flexibility and integration
Low power
20-year-estimated life cycle
High productivity design tools
Intel Corporation. All rights reserved. Intel, the Intel logo, Altera, Arria, Cyclone, Enpirion, MAX, Nios, Quartus
and Stratix words and logos are trademarks of Intel Corporation or its subsidiaries in the U.S. and/or other
countries. Intel warrants performance of its FPGA and semiconductor products to current specifications in
accordance with Intel's standard warranty, but reserves the right to make changes to any products and services
at any time without notice. Intel assumes no responsibility or liability arising out of the application or use of any
information, product, or service described herein except as expressly agreed to in writing by Intel. Intel
customers are advised to obtain the latest version of device specifications before relying on any published
information and before placing orders for products or services.
*Other names and brands may be claimed as the property of others.
Secure on-die flash memory enables device configuration in less than 10 ms
Single device integrating PLD logic, RAM, flash memory, digital signal
processing (DSP), ADC, phase-locked loop (PLL), and I/Os
Small packages available from 3 mm × 3 mm
Sleep mode—significant standby power reduction and resumption in less than
1 ms
Longer battery life—resumption from full power-off in less than 10 ms
Built on TSMC's 55 nm embedded flash process technology
®
Quartus
Prime Lite edition (no cost license)
Qsys system integration tool
®
DSP Builder for Intel
FPGAs
®
Nios
II Embedded Design Suite (EDS)
Supporting Feature
ISO
9001:2008
Registered

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