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MTRR Mapping [Continuous]
Sets the method used for programming CPU MTRRs when 4GB or more
memory is installed on the system. When set to Discrete, the BIOS leaves
the PCI hole below the 4GB boundary undescribed. Set to Continuous to
describe the PCI hole as non-cacheable.
Configuration options: [Continuous] [Discrete]
PowerNow [Disabled]
Enables or disables generation of the ACPI_PPC, _PSS, and _PCT objects.
Configuration options: [Disabled] [Enabled]
4.4.2
Chipset
The Chipset menu allows you to change the advanced chipset settings.
Select an item then press <Enter> to display the sub-menu.
Advanced Chipset Settings
WARNING: Setting wrong values in below sections
may cause system to malfunction.
NorthBridge Configuration
SouthBridge/MCP55 Configuration
PCI Express Configuration
Smbios Configuration
NorthBridge Configuration
The NorthBridge Configuration menu allows you to change the Northbridge
settings.
NorthBridge Chipset Configuration
Memory Configuration
ECC Configuration
IOMMU Option Menu
Power Down Control
Alternate VID
Memory CLK
CAS Latency (Tcl)
RAS/CAS Delay (Trcd)
Min Active RAS (Tras)
Row Precharge Time (Trp)
RAS/RAS Delay (Trrd)
Row Cycle (Trc)
Read to Precharge Time (Trpt) : 2 CLK
Write Recovery Time (Twrt)
Read Command Delay (Twtr)
Asynchronous Latency
ASUS KFN5-Q Series
[Auto]
[Auto]
: 333 MHz
: 5.0
: 5 CLK
: 15 CLK
: 5 CLK
: 3 CLK
: 21 CLK
: 5 CLK
: 3 CLK
: 6 ns
Options for NB.
4-15
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