Dm860A Unit - Denon AVR-1913 Service Manual

1 2
JTAG
R2704
33*4
MP OPEN
ETCK 1 8
2 7
ETDO
N2601 3 6
ETMS
FFC-7P (1.0-16-7PB-2)
ETDI 4 5
R2705
33*4
GND R2601 OPEN
1 8
E_RXDMIEO
RX
DEBUG_RX 2 7
DEBUG_TX
TX
DEBUG_TX
E_TXDMOEI 3 6
3.3V
4 5
DEBUG_RX
R2706
33*4
1 8
E_SPI_CLK
E_SPI_MIEO 2 7
3 6
E_SPI_MOEI
E_SPI_CS 4 5
N2602
R2604 10K
FFC-6P (1.0-16-6PB-2)
ETMS R2707 10K
ETCK R2721 10K
ETDI
ETDO R2618 13K-D(1608)
R2619 6K2-D(1608)
4 5
R2708
3 6
10K*4
2 7
1 8
R2605 33
R2653 E_RESETN
0
R2606 33
R2607 33
Q2601
OPEN
C2601
1N-K R2608 33
E_SPI_REQ
Q2602
OPEN
R2609 10K
R2610 10K
R2611 10K
E_RESET
X2601 24MHz(FCX-04)
C2602 12P-J
1 4
ST VDD
R2603
FCXO-05 R2612
OPEN
GND OUT 1K
2 3 C2603 12P-J
U2601
R2613 10K
OPEN(22.5792MHz)
R2614 3K-F
R2615
MIITXD2.
R2616
MIITXD3.
R2617
MIITXEN.
R2620
MIIPHYCLK.
TO
AH
NET PHY
TO AK
GND GND POWER + POWER + POWER - POWER -
3
U2602
DM860A
1 2 3 4 5 6
JTAG A1 A2 A3 A4 A5 A6 A7
TCK
A
TDO USBD- NET3.3V DGND NET3.3V
TMS
B1 B2 B3 B4 B5 B6 B7
TDI
B
UART USBD+ NET3.3V DGND DGND
TXD0
C1 C2 C3 C4 C5 C6 C7
TXD1
C
RXD0
DGND USBREXT USBXI NRES12OUT DGND
RXD1
D1 D2 D3 D4 D5 D6 D7
SPI
D
SPICLK
NET1.2V USBVBUS NRES33OUT NRES33REF NRES12REF NET3.3V
SPIDOUT
SPIDIN E1 E2 E3 E4 E5 E6 E7
SPINCS0
E
SPINCS1
DGND USBID USBVBUSDRV NET1.2V NET1.2V
F1 F2 F3 F4 F5 F6 F7
HIGHZ
F
TEST1_DM
NET3.3V RTCXIN VDD33PLL NET3.3V DGND
G1 G2 G3 G4 G5 G6 G7
RESET
G
VDD12DCO RTCXOUT DGND NET3.3V DGND
NRES12REF
NRES33REF
H1 H2 H3 H4 H5 H6 H7
NRES12OUT
NRES33OUT H
DGND DGND VDD12PLL NET1.2V DGND
J1 J2 J3 J4 J5 J6 J7
J
NRESET
E_SPI_REQ. CPRST XTALO NET1.2V DGND
K1 K2 K3 K4 K5 K6 K7
CLOCK
K
PDOUT0 VCO0 XTALI NET3.3V DGND
E_SPI_REQ.
L1 L2 L3 L4 L5 L6 L7
PDOUT0
L
VCO0 AV0CLK NET3.3V DGND
M1 M2 M3 M4 M5 M6 M7
XTALI
R2621 XTALO M
1M
AV0DATA3 NET1.2V DGND
RTC
N1 N2 N3 N4 N5 N6 N7
RTCXIN
N
RTCXOUT
AV0DATA2 AV0DATA1 AV0DATA0 AV1DATA3 NET1.2V DGND
P1 P2 P3 P4 P5 P6 P7
P
RREF AV1DATA2 AV1DATA1 AV1DATA0 NET3.3V NET3.3V
R1 R2 R3 R4 R5 R6 R7
R
AV2CLK AV2CTRL1 AV2DATA2 PHY_RST
ETHER
T1 T2 T3 T4 T5 T6 T7
T
AV2CTRL0 AV2DATA1 AV3CTRL1
U1 U2 U3 U4 U5 U6 U7
CPRST
U
AV2DATA0 AV3CTRL0 860SPDIF.
MIIRXD2
MIIRXD3
V1 V2 V3 V4 V5 V6 V7
MIIRXCLK
MIIRXDV
V
MIIRXER
33
MIITXD2
33
MIITXD3
33
MIITXEN
MIICOL
MIICRS
MIIMDC
MIIMDIO
33
MIIPHYCLK
PHY_RST
VPP NET3.3V
R2622
1K5
C2604
OPEN
STBY POWER STBY POWER
4 5
7 8 9 10 11 12 13 14 15 16 17
A8 A9 A10 A11 A12 A13 A14 A15 A16 A17
HIGHZ RXD1 TDO TDI DM_A0
B8 B9 B10 B11 B12 B13 B14 B15 B16 B17
TEST1_DM TXD1 RXD0 TMS SPICLK SPINCS1
C8 C9 C10 C11 C12 C13 C14 C15 C16 C17
RREF TXD0 TCK SPINCS0 DM_A3 DM_A4
D8 D13 D14 D15 D16 D17
D9 D10 D11 D12
NET1.2V NRESET SPIDIN SPIDOUT DM_A6 DM_A7
E8 E9 E10 E11 E12 E13 E14 E15 E16 E17
NET3.3V NET3.3V NET1.2V NET1.2V NET3.3V NET3.3V DM_A9 DM_A10 DM_A11
F8 F9 F10 F11 F12 F13 F14 F15 F16 F17
DGND DGND DGND DGND DGND DGND DGND NET1.2V DM_A13/RAS DM_A14/CAS DM_A15/BA0
G8 G9 G10 G11 G12 G13 G14 G15 G16 G17
DGND DGND DGND DGND DGND DGND DGND NET1.2V DM_A17/DQM0 DM_A18/DQM1
H8 H9 H10 H11 H12 H13 H14 H15 H16 H17
DGND DGND DGND DGND DGND DGND DGND NET3.3V
J8 J9 J10 J11 J12 J13 J14 J15 J16 J17
NCS2
DGND DGND DGND DGND DGND DGND DGND NET3.3V NCS0 NCS1
K8 K9 K10 K11 K12 K13 K14 K15 K16 K17
DGND DGND DGND DGND DGND DGND DGND NET1.2V MEMCLK NWE NOE
L8 L9 L10 L11 L12 L13 L14 L15 L16 L17
DGND DGND DGND DGND DGND DGND DGND NET1.2V DM_D3 DM_D2 DM_D1
M8 M9 M10 M11 M12 M13 M14 M15 M16 M17
DGND DGND DGND DGND DGND DGND DGND NET3.3V DM_D7 DM_D6 DM_D5
N8 N9 N10 N11 N12 N13 N14 N15 N16 N17
DGND DGND DGND DGND DGND DGND DGND NET3.3V DM_D11 DM_D10 DM_D9
P8 P9 P10 P11 P12 P13 P14 P15 P16 P17
NET1.2V NET1.2V NET3.3V NET3.3V NET1.2V NET1.2V FD0 FD1 DM_D13
R8 R9 R10 R11 R12 R13 R14 R15 R16 R17
VPP MIITXEN MIIRXER MIICRS FD2 FD3 FD4
T8 T9 T10 T11 T12 T13 T14 T15 T16 T17
MIIRXCLK MIICOL MIIRXDV FD5 FD6 FD7
U8 U9 U10 U11 U12 U13 U14 U15 U16 U17
MIITXD2 MIIRXD2 MIIMDIO NFCE0 FCLE NFWE
V8 V9 V10 V11 V12 V13 V14 V15 V16 V17
MIITXD3 MIIRXD3 MIIMDC MIIPHYCLK NFWP NFRE
VDD12DCO
VDD12PLL
L2602
VDD33PLL NET1.2V BLM21PG221
L2601
L2603
BLM21PG221
BLM21PG221
133
6 7
SDRAM
R2709
DM_A18/DQM1 1 8 .DM_A18/DQM1
33*4
2 7 .DM_A16/BA1
DM_A16/BA1
DM_A15/BA0 3 6 .DM_A15/BA0
4 5
18 DM_A12 .DM_A12
R2710
1 8 .DM_A10
A18 DM_A10
33*4
DM_A14/CAS 2 7 .DM_A14/CAS
3 6 .DM_A13/RAS
DM_A13/RAS
DM_A1
4 5 .DM_A17/DQM0
DM_A17/DQM0
R2711
B18 1 8 27 26 25 24 23 22 21 20 19
DM_A11 .DM_A11
33*4
2 7 .DM_A8
DM_A8
DM_A2 DM_A7 3 6 .DM_A7
4 5 .DM_A5
DM_A5
C18 R2712
1 8
33*4
28 29 30 31 32 33 34 35 36 37 38
DM_A9 2 7 .DM_A9
DM_A5
3 6 .DM_A3
DM_A3
DM_A6 4 5 .DM_A6
D18
R2713
1 8
DM_A4 .DM_A4
33*4
2 7 .DM_A2
DM_A2
DM_A8
DM_A1 3 6 .DM_A1
4 5 .DM_A0
E18 DM_A0
DM_A12
F18
DM_A16/BA1
DM_D0
G18
DM_D1
DM_D2
DM_D3
DM_D4
H18
DM_D5
27 26 25 24 23 22 21 20 19
DM_D6
NCS3
DM_D7
DM_D8
J18
DM_D9
DM_D10
MEMCKE 28
29 30 31 32 33 34 35 36 37 38
DM_D11
K18 DM_D12
DM_D13
NWAIT DM_D14
DM_D15
L18
DM_D0
M18
DM_D4 R2638 OPEN
NOE
N18
R2636 33
NCS3
R2643 33
NWE .NWE
DM_D8
R2644 33
MEMCKE .MEMCKE
R2641 33
P18 MEMCLK MEMCLK1
R2642 33
MEMCLK2
DM_D12 NCS0
R2646 33
NCS1 .NCS1
R18
R2637
OPEN R2719
4K7*4
DM_D14
C2651
R2648 OPEN
OPEN
T18 R2649 OPEN
NWAIT
DM_D15
U18
NFRB
NAND
V18
FD0
FD1
FALE
FD2
FD3
FD4
FD5
FD6
FD7
FALE
FCLE
NFRB
NFCE0
NFRE
NFRB
NFCE0
NFRE
NFWE
NFWP C2659 100N-K
FCLE
FALE
NFWE
NFWP
NET3.3V NET1.2V
DGND DGND
TO AI
MAIN DAC
TO AE
SCHEMATIC DIAGRAMS (9/26)

DM860A UNIT

8
DM860A
A
R2714
1 8
DM_D3
33*4
2 7 DM_D2
3 6
DM_D1
4 5 DM_D0
18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
SDRAM1 (32MB) U2604
A3V56S30FTP-G6
39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54
1 8 DM_D7
R2715
2 7
DM_D6
33*4
3 6 DM_D5
4 5
DM_D4
B
R2716
1 8
DM_D11
33*4
2 7
DM_D10
3 6 DM_D9
4 5
DM_D8
18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
SDRAM2 (32MB) U2605
A3V56S30FTP-G6
39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54
DM_D15
5 4
DM_D14
6 3
R2718
DM_D13
7 2
33*4
DM_D12
8 1
C
NAND FLASH (1G)
U2603
H27U1G8F2BTR-BC
NC NC
D
NC NC
NC NC
NC NC
NC I/O7 FD7
NC I/O6 FD6
R/B# I/O5 FD5
RE# I/O4 FD4
CE# NC
NC NC
NC NC
C2678 100N-K
VCC VCC
VSS VSS
NC NC
NC NC
CLE NC
FD3
ALE I/O3
WE# I/O2 FD2
FD1
WP# I/O1
NC I/O0 FD0
NC NC
NC NC
NC NC
NC NC
E
F