Yamaha RX-V2600 Service Manual page 111

A B C
SCHEMATIC DIAGRAM (A-VIDEO 2/2)
1
Page 105 F4
to OPERATION (3)_CB906
2
4.8
0
0
3
0
0
-4.7
-4.7
4
0
4.5
4.5
0
4.5
4.8
5
0
4.5
6
0
4.5
4.5
0
4.5
4.9
0
4.5
0
4.5
4.5
0
7
4.5
5.0
0
0
4.5
4.5
8
4.5
4.5
0
9
IC701~704: MM74HC4051SJX
8-Channel Analog Multiplexer
VCC Y7
16
A 11
Binary
B 10
to
10 Logic
1 of 8
Level
Decoder
Conversion
with
C 9 INHIBIT
INH 6
8 7
GND VEE
D E F
0.1 4.8
0.1 0.2
5.0
0.1
0.2
0 0
2.7 2.7
0.1
0.1
INPUT 0 4.8
SELECTOR
0.2
-4.8
0
0.2
REC/ZONE
SELECTOR
4.8
0.1
0.1 0.2
0.1 0.2
0 0
0.1 0.1
0
4.8
0.2
-4.7
-4.8
0
0.2
-4.7
4.8 4.8
0.1 4.8
0
0.1 0.2
0.1 0.2
-4.7
0 0
0.1 0.1
-4.7
0 4.8
INPUT
-4.8 0.2
SELECTOR
0 0.2
REC/ZONE
SELECTOR 0.1 4.8
0.1 0.2
4.8
0.1 0.2
0 0 0
4.9
0.1 0.1
0 4.8
-0.3
-4.8 0.2 -0.9
0
0.2
-4.7
INPUT
SELECTOR
0.1 9.0
0.1 0.1
0.1 0.1
4.8
0 0 0
4.5
0.1 0.1
0
4.9
0 9.0 9.0
0.2
0 -4.8
0.2
4.5 0 0.2
0
4.9
0.2
0
REC/ZONE
4.5
SELECTOR
0 0.1 9.0
0.2
0.1 0.1
0.1 0.1
4.9
0 0
0.2
0.1
0.1
0 9.0 4.8
0.2
-4.8
0 0.2
4.9
9.0
0.2
4.9
0.2
0.2
4.9
0
0.2
4.5
0
SOURCE/REC
0
4.5
SELECTOR
0
0
4.5
0
0
0
4.5
0.2
0
0 0.1
0.9
4.5
0.2 0.2
0 0
0
0 0
0
4.5 0
4.8
4.8 4.8
4.8
0
-0.1
0
4.5
-0.1
0
4.5
-0.1
0
4.5
Page 108
to INPUT (5)_CB317
IC705, 706: CD4051BNSR
Single 8-Channel multiplexer
CHANNEL IN/OUT
CHANNEL IN/OUT
V DD
7 6 5 4 3 2 1
Y6 Y5 Y4 Y3 Y2 Y1 Y0
16 4 2 5 1 12 15 14
4 2 5 1 12 15 14 13
TG
A †
11
TG
TG
B †
10 BINARY
TG COMMON
3 LOGIC TO
OUT/IN 1 OF 8
TG LEVEL
DECODER
CONVERSION
C WITH
† 9 INHIBIT
TG
TG
INH † 6
TG
† All inputs are protected by standard CMOS protection network.
8 7
V SS V EE
G H
SIGNAL DETECT
2.7
0.2
2.7 2.6 5.0 0.2
0.2
4.9
0
0
0
4.9
0
0
0
0
0
0
-4.8
4.9
4.2
1.1 0.6
4.2 0.1 CLAMP
-1.0
-0.5
-1.9
-0.3
1.7
1.0
1.0
A-3
4.8
2.4 4.8
2.5
4.8
0 0
0
4.8
2.4
2.4 0.1
2.0
OSD
4.9 4.8
IC
0 1.0
0
0
4.9 1.7
4.8 4.8
0.6 1.7
1.1
-0.1
POINT A-3 Pin 3 of IC715
L2 Page 110 H7
to A-VIDEO (1)_CB602
IC707, 708: MM74HC4053SJX
Triple 2-Channel Analog Multiplexer
IN/OUT
0
13 VCC CY CX BY BX AY AX
TG
16 3 5 1 2 13 12
TG
Logic Binary to
TG 1 of 2 TG
Level OUT/IN
A 11 Decoders 14
Conversion AX or AY
with
TG
TG INHIBIT
COMMON
Logic
3
OUT/IN Level TG
B 10 Binary to OUT/IN
TG Conversion 15
1 of 2
BX or BY
Decoders TG
TG with
Logic
9 INHIBIT
C Level TG
Conversion OUT/IN
TG 4
Binary to CX or CY
TG
1 of 2
Logic
TG 6 Decoders
INH Level
with
Conversion
INHIBIT
CD4051B
8 7
GND VEE
I J K
Page 103 G2
to FUNCTION (1)_CB311
IC709: LA73050-TLM-E IC710: LA7104M
Analog Amp Video Amp
N.C. 1 36 N.C. VIN1+
N.C. 2 35 N.C. NFB1
VIN1 3 +VCC1 MUTE1
34
+Vcc
DCCNT1 4 6dB DR 33 VOUT1 VIN2+
GND 5 32 GND NFB2
6 -VCC1
VIN2 31 VOUT2
6dB DR
MUTE1 7 30 N.C. VIN3+
VIN3 8 29 VOUT3 NFB3
6dB DR
N.C. 9 28 -VCC1
N.C. 10 27 -VCC2
N.C. 11 N.C.
26
IC714: BD7851FP-E2
VIN4 12 25 +VCC2
LED driver IC with built-in 16bit shift register
+Vcc
DCCNT2 13 6dB DR 24 VOUT4
GND
14 R_lref
GND 23 GND
LATCH
VIN5 15 22 VOUT5 S_IN
6dB DR OUT16
MUTE2 16 21 N.C. OUT15
VIN6 17 20 VOUT6
6dB DR
OUT14
-VCC4 18 19 -VCC3
OUT13
OUT12
OUT10
OUT9
OUT8
IC712: TK15420M
Video Amp
1
OUT A 8 VCC
IC715: LC74781JM-9798
–IN A 2 7 OUT B
On-Screen Display Controller LSI
+ – + –
+IN A 3 6 –IN B
VEE 4 5 +IN B
CS
SIN
SCLK
RST
IC713: TC74HCU04AFEL
VDD1
Hex Inverters
VSS1
1A 1 14 VCC
VDD2
1Y 2 13 6A
CHARA
2A 3 12 6Y
2Y 4 11 5A
3A 5 10 5Y
3Y 6 9 4A
OSCIN
GND 7 8 4Y
OSCOUT
A-VIDEO (2) SYNIN
SEPC
SEPOUT
SEPIN
CTRL3
# All voltages are measured with a 10MΩ/V DC electronic volt meter.
# Components having special characteristics are marked s and must be replaced
with parts having specifications equal to those originally installed.
# Schematic diagram is subject to change without notice.
L M N
RX-V2600/DSP-AX2600
IC711: LA7106M-TLM-E
Analog Amp
1 16 +VCC VIN1+ 1 16 +VCC
2 2
6dB DR 15 VOUT1 NFB1 6dB DR 15 VOUT1
3 14 GND MUTE1 3 14 GND
4 13 VOUT2 VIN2+ 4 13 VOUT2
6dB DR 6dB DR
5 12 DR CTL NFB2 5 12 DR CTL
6 11 VOUT3 -VCC1 6 11 VOUT3
7 6dB DR 10 MUTE2 VIN3+ 7 6dB DR 10 MUTE2
8 8
9 -VCC2 NFB3 9 -VCC2
Vcc
Control circuit 25
1
24
2
Shift register
CLOCK
3
4 LATCH 22 SOUT
OUT1
5 21
Output buffer p
6 OUT2
20
7
OUT3
8 19
OUT4
9 18
10 17
OUT6
12 15
OUT7
13 14
BD7851FP
9
8-bits
Serial
latch
11
+
parallel
command
RAM
10 converter decoder Horizontal Vertical Horizontal Vertical Blinking
Display
character character display display and inversion write
control address
size size position position control
register
register register register register register counter
23
Blinking
Horizontal Vertical Horizontal Vertical
and inversion Display
size size dot dot
control RAM
16, 24 counter counter counter counter
circuit
1
12
Horizontal Vertical
display display
position position
8 register register
Character Line Decoder
control control
counter counter
Sync
dis-
Font
criminator
Character ROM
6
output dot
clock
7
generator
Shift
Character output control
Synchronisation register
Timing generator Background control
signal generator
17 Composite
Video output control
sync
Sync
18 signal
separator
separator
19 control
20
22
21 4 2 3 5 15 13
CTRL2 CTRL1 XtalIN XtalOUT BLANK CVIN CVOUT
111