Chipset Configuration - ECS h61h2-a2 Manual

 Chipset Configuration
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Main Advanced
Memory Multiplier Configuration
Memory Multiplier
Memory Timing Configuration
CAS# Latency(tCL) :
Row Precharge Time(tRP)
RAS# to CAS# Delay(tRCD)
RAS# Active Time(tRAS)
Write Recovery Time(tWR)
Row Refresh Cycle Time(tRFC)
Write to Read Delay(tWTR)
Active to Active Delay(tRRD)
Read CAS# Precharge(tRTP)
Four Active Window Delay(tFAW)
Intel Graphics Configuration
GT OverClocking
Memory Multiplier Configuration
This item shows the information of Memory Multiplier Configuration.
Memory Multiplier (10.67)
This item shows the information of Memory Multiplier.
Memory Timing Configuration
This item shows the information of Memory Timing Configuration.
CAS# Latency (tCL) (8)
This item determines the operation of DDR SDRAM memory CAS (column address
strobe). It is recommanded that you leave this item at the default value. The 2Tsetting
requires faster memory that specifically supports this mode.
Row Precharge Time (tRP) (8)
This item specifies Row precharge to Active or Auto-Refresh of the same bank.
RAS# to CAS# Delay (tRCD) (8)
This item specifies the CAS# to RAS# delay to RdWr command to the same bank.
RAS# Active Time (tRAS) (20)
This item specifies the RAS# active time.
Write Recovery Time (tWR) (8)
This item specifies the write recovery time.
Row Refresh Cycle Time (tRFC) (59)
This item specifies the row refresh cycle time.
Write to Read Delay (twTR) (4)
This item specifies the write to read delay time.
Chipset M.I.B III
10.67
8
8
8
20
8
59
4
4
4
16
Disabled
Using BIOS
Boot Security
Disabled/Enabled GT
Overclocking
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F2: Previous Values
F3: Optimized Defaults
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49
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