Chipset Configuration; Memory Timing Configuration - ECS H61H2-M3 Manual

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Power Limit 1 Value(Watt) (95)
Use this item to control the limit of the TDP. This is for Turbo mode.
Power Limit 2 Switch (Enabled)
Use this item to control the Power Limit 2. This is for Turbo mode.
Power Limit 2 Value (1)
Use this item to control Power Limit 2. PL2 provides an upper limit of the TDP
excursions. This is for Turbo mode.
Long duration maintainded(Tau) (1)
Use this item to control the time window over PL1 value should be maintained. This
is for Turbo mode.
Enhanced Intel SpeedStep Technology (Enabled)
This item allows users to enable or disable the EIST(Enhanced Intel SpeedStep
Technology).
Turbo Mode (Enabled)
This item allows you to control the Intel Turbo Boost Technology.
1/2/3/4-Core Ratio (31/30/30/29)
This item shows th Core Ratio limit value.
Press <Esc> to return to the Performance Tunning page.

Chipset Configuration

Scroll to this item to view the following screen:
Main Advanced

Memory Timing Configuration

CAS# Latency (tcl)
Row Precharge Time (tRP)
RAS# to CAS# Delay (tRCD)
RAS# Active Time (tRAS)
Intel Graphics Configuration
GT OverColocking
Memory Timing Configuration
This item shows the information of Memory Timing Configuration.
CAS#Latency(tcl) (9)
This item determines the operation of DDR SDRAM memory CAS(colulmn address
strobe). It is recommanded that you leave this item at the default value. The 2T
setting requires faster memory that specifically supports this mode.
Aptio Setup Utility - Copyright (C) 2010 American Megatrends, Inc.
Chipset M.I.B III
9
9
9
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[Disabled]
Version 2.02.1205. Copyright (C) 2010, American Megatrends, Inc.
Using BIOS
Boot Security Save & Exit
Cas Latency, Range 3-15.
:Select Screen
:Select Item
Enter : Select
+/- : Value
F1:General Help
F2:Previous Value
F3:Optimized Defaults
F4:Save & Exit
ESC:Exit