Radio Shack TRS-80 Service Manual page 8

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(101
INO
-
IN7
Input port
. The MPU
takes
the signol on
INO
-
IN7 input port into
the
internal
accumulator as
8·bit dal3.
(111
PU,
PV,
DIS
On
chip
llip
Oops
output from
LSI
pins.
PU:
Set
to
high wilh the SPU
instruction
and set to low
with the
RPU instruction.
PV: Set
to
hish with the
SPV instruction
and set to low
with
the
RPV
instruction.
DIS:
Set to
high with the SDP
instruction
and set
to
low
with
the RDP instruction.
(121 P,P
Strobe
output
is outputted
nonnally
during the
exccution
of the ATP instruc
tion,
used for the extem
ol
latch of the A
rcgL<; ;
ter contents.
(1
31
<PQS
Clock
is in the same phase
as
the basic
clock inside
the
chip
and it
is
the basic
clock
for an entire
system.
lt
becomes the basic
clock
of I .3Mltt
frequency
when
a
2.6~11tt
crystal
is
connected between XLO and
XLI.
(141
WAIT
(1 51
(161
(171
W AJT
output
that
Informs
the MPU that
addressed
memory or 1
{0
device is
not
ready.
TI1e
MPU is
in
the wait
state while
this signal is
on.
HO-H7
I.CD
backplate signal
VA,
VB,
VM,
VDIS
LCD
drive
source.
HI
N
LCD
backplat
e signal.
Counter input that generates HO-H7.
Normally connoeted
to HA.
(181
HA
MPU divider output
.
(191
BFO, BF
I
MPU internal
register
llF OipOop output
(llFO)
and input
(BFI)
can
be
re.ct
by the
instruction
from the MPU
and
set
by
the
BFI
input.
Normally used
for the memory
backup system.
(201
NMI
Non-maskable
i.
n terrupt. A high NMI
signal denotes
an
interrupt request, to
wltich the MPU
responds
un
conditionally
and
the
control
moves
to
start
the interrupt processing
routine
after the contents of the nternory
3.ddress
FFFC
is n1ovcd into
the
high O'
r
der
byte of the
p rogram counter
und
the contents
of tho
memory
address FFFD
into
the
low
order
byte of the
program counter.
(211 M
l
Maskable
i
nterrupt.
A high on
this signal
makes
interrupt
request
when interrupt
e nable
is
set.
The MPU
responds
uncondi·
lion.Uy to
this
request
.
Cpntrol
moves to start
the
interrupt processing routine after the
contents of
the memory address
FFF8 is
moved
into
the high order byte of the program
counter,
the
contents
of the memory address
FFF9
are moved
Into
the
low
ord
er
byte
of
the program
counter.
(221
OD
Output
disable.
When the
OD
signal
is active the
data bus
i:S
in
the output mode.
Do not
sale
this
PDF !!!
-s-

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