Sony BDP-CX7000ES Service Manual page 110

BDP-CX7000ES
QQ
3 7 63 1515 0
VP-062EJ BOARD IC401 EP1C12F324C8N (300) (FPGA)
Pin No. Pin Name
A1 GND
A2 VCCINT
A3 GND
A4 -
A5 VCCIO2
A6, A7 -
A8 -
A9 -
A10 to A12 -
A13 -
A14 VCCIO2
A15 -
A16 GND
A17 VCCINT
A18 GND
B1 VCCINT
B2 GND
B3 DEV_OE
B4 -
B5 DPCLK2
B6, B7 -
B8 -
B9 -
B10 to B12 -
B13 -
B14 DPCLK3
TE
L 13942296513
B15, B16 -
B17 GND
B18 VCCINT
C1 GND
C2 CRC_ERROR
C3 INT_DONE
C4 DEV_CLRn
C5, C6 -
C7, C8 -
C9 -
C10 -
C11, C12 -
C13, C14 -
C15 -
C16 -
C17 -
C18 GND
D1 -
D2 -
D3 CLKUSR
D4 -
D5, D6 -
D7 -
D8 -
D9 -
D10 -
www
D11, D12 -
D13, D14 -
D15 -
.
D16 -
D17 -
D18 -
110
http://www.xiaoyu163.com
I/O
- Ground terminal
- Power supply terminal (+1.5V)
- Ground terminal
O Vertical sync signal output to the video encoder
- Power supply terminal (+3.3V)
O Digital video signal output to the video encoder
- Not used
O Video clock signal output to the component interface
O Digital video (Cb/Cr) signal output to the component interface
O Digital video (Y) signal output to the component interface
- Power supply terminal (+3.3V)
O Digital video (Y) signal output to the component interface
- Ground terminal
- Power supply terminal (+1.5V)
- Ground terminal
- Power supply terminal (+1.5V)
- Ground terminal
I Not used
O Horizontal sync signal output to the video encoder
I Clock signal input from the clock conditioner
O Digital video signal output to the video encoder
O Video clock signal output to the video encoder
- Not used
O Digital video (Cb/Cr) signal output to the component interface
O Digital video (Y) signal output to the component interface
I/O Not used
O Digital video (Y) signal output to the component interface
- Ground terminal
- Power supply terminal (+1.5V)
- Ground terminal
O Not used
O INIT_DONE signal output terminal
I Reset signal input from the BD decoder
O Digital video signal output to the video encoder
- Not used
O Vertical sync signal output to the component interface
- Not used
O Digital video (Cb/Cr) signal output to the component interface
O Digital video (Y) signal output to the component interface
- Not used
O Digital video (Cb/Cr) signal output to the component interface
- Not used
- Ground terminal
O Vertical sync signal output to the HDMI interface
O Horizontal sync signal output to the HDMI interface
I Not used
O Clock signal output to the clock conditioner
O Digital video signal output to the video encoder
I Vertical sync signal input from the component interface
I Video clock signal input from the component interface
O Horizontal sync signal output to the component interface
- Not used
O Digital video (Cb/Cr) signal output to the component interface
x ao u163
O Digital video (Y) signal output to the component interface
y
- Not used
i
I Reset signal input from the BD decoder
I Horizontal sync signal input from the digital video format converter
I Vertical sync signal input from the digital video format converter
http://www.xiaoyu163.com
2 9
8
Description
Q Q
3 6 7 1 3 1 5
"L": reset
co
.
"L": reset
9 4 2 8
0 5 8 2 9 9 4 2 8
m
9 9
9 9