National Instruments DIO 6533 User Manual page 5

High-speed digital i/o boards for pci, pxi, compactpci, at, eisa, or pcmcia bus systems
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Table of Contents
AT Device Configuration ............................................................................................. 2-5
Bus Interface .................................................................................................. 2-5
Chapter 3
Unstrobed I/O ............................................................................................................... 3-4
Strobed I/O-Pattern Generation and Handshaking .................................................... 3-5
Pattern and Change Detection........................................................................ 3-6
Handshaking Protocols .................................................................................. 3-8
Comparing Protocols...................................................................................... 3-10
Starting a Handshaking Transfer.................................................................... 3-12
Transfer Rates............................................................................................................... 3-13
Chapter 4
I/O Connector ............................................................................................................... 4-1
Signal Descriptions ........................................................................................ 4-3
RTSI Bus Interface......................................................................................... 4-7
Data Signal Connections .............................................................................................. 4-9
Unstrobed I/O................................................................................................. 4-10
Strobed I/O..................................................................................................... 4-12
DIO 6533 User Manual
Plug and Play Mode......................................................................... 2-5
Switchless Data Acquisition ............................................................ 2-5
Base I/O Address Selection............................................... 2-6
DMA Channel Selection ................................................... 2-6
Interrupt Channel Selection............................................... 2-6
Pattern-Detection Triggers .............................................................. 3-6
Change Detection ............................................................................ 3-7
Message Generation ........................................................................ 3-8
8255 Emulation................................................................................ 3-9
Level ACK....................................................................................... 3-9
Leading-Edge Pulse ......................................................................... 3-9
Long Pulse ....................................................................................... 3-9
Trailing-Edge Pulse ......................................................................... 3-9
Burst Mode ...................................................................................... 3-10
Controlling the Startup Sequence .................................................... 3-12
Controlling Line Polarities .............................................................. 3-13
Signal Characteristics ...................................................................... 4-6
Control Signal Summary ................................................................. 4-7
Board and RTSI Clocks ................................................................... 4-8
RTSI Triggers .................................................................................. 4-8
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© National Instruments Corporation

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