Cascading Counters; Counter Filters - National Instruments Data Acquisition Device NI USB-621x User Manual

Cascading Counters

Counter Filters

Note NI-DAQmx only supports filters on counter inputs.
Filter Setting
125 ns
6.425 μs
2.56 ms
Disabled
© National Instruments Corporation
You can internally route the Counter n Internal Output and Counter n TC
signals of each counter to Gate inputs of the other counter. By cascading
two counters together, you can effectively create a 64-bit counter. By
cascading counters, you also can enable other applications. For example,
to improve the accuracy of frequency measurements, use reciprocal
frequency measurement, as described in the
Frequency Measurement
You can enable a programmable debouncing filter on each PFI signal.
When the filters are enabled, your device samples the input on each rising
edge of a filter clock. USB-621x devices use an onboard oscillator to
generate the filter clock with a 40 MHz frequency.
The following is an example of low to high transitions of the input signal.
High to low transitions work similarly.
Assume that an input terminal has been low for a long time. The input
terminal then changes from low to high, but glitches several times. When
the filter clock has sampled the signal high on N consecutive edges, the low
to high transition is propagated to the rest of the circuit. The value of N
depends on the filter setting; refer to Table 8-5.
Table 8-5. Filters
N (Filter Clocks
Needed to
Pass Signal)
5
257
~101,800
—
The filter setting for each input can be configured independently. On power
up, the filters are disabled. Figure 8-29 shows an example of a low to high
transition on an input that has its filter set to 125 ns (N = 5).
section.
Pulse Width
Guaranteed to
Pass Filter
125 ns
6.425 μs
2.56 ms
—
8-33
Chapter 8
Method 3 bullet of the
Pulse Width
Guaranteed to
Not Pass Filter
100 ns
6.400 μs
2.54 ms
—
NI USB-621x User Manual
Counters