Aiwa HT-DV2300 Service Manual page 51

IC DESCRIPTION -3/3 (HDC25D811B -3/6)
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Pin No. Pin Name
83 CAPT2
84 AOUT1
85 AGND
86 AGND
87 CAPT1
88 AOUT0
89 CAPT0
90 ADCVCM
91 VREFN
92 VREFP
93 CH0
94 CH1
95 CH2
96 CH3
97 CH4
98 AGND
99 AGND
100 CH5
101 AVDD
TE
102 AVDD
L 13942296513
103 REFBIAS1
104 REF
105 TESTOUT1
106 TESTOUT1
107 TESTOUT1
108 TESTOUT1
109 TESTOUT1
110 TESTOUT1
111 GND
112 RAMTO7
113 RAMTO6
114 RAMTO5
115 RAMTO4
116 RAMTO3
117 RAMTO2
118 RAMTO1
119 RAMTO0
120 VDD
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121 SENS
122 VDD
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123 LRCK
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I/O
- DAC Top Coupling Cap Port for DAC 2
O SERVO D/A OUT1
- AGND : DAC10BIT
- AGND : DAC10BIT
- DAC Top Coupling Cap Port for DAC 1
O SERVO D/A OUT0
- DAC Top Coupling Cap Port for DAC 0
I ADC Swing Reference (AVDD/2) (use 1uF,10
I ADC bottom voltage
I ADC top voltage
I ADC Input channel 0
I ADC Input channel 1
I ADC Input channel 2
I ADC Input channel 3
I ADC Input channel 4
- AGND : ADC10BIT
- AGND : ADC10BIT
I ADC Input channel 5
- AVDD : ADC10BIT
- AVDD : ADC10BIT
I Test pin for adjusting the bias level, e
I ADC REF BIAS
I/O TEST OUT (Default 0)
I/O TEST OUT (Default 0)
I/O TEST OUT (Default 0)
I/O TEST OUT (Default 0)
I/O TEST OUT (Default 0)
I/O TEST OUT (Default 0)
- GND
O Internal RAM Test Out
O Internal RAM Test Out
O Internal RAM Test Out
O Internal RAM Test Out
O Internal RAM Test Out
O Internal RAM Test Out
O Internal RAM Test Out
O Internal RAM Test Out
- VDD
O SERVO DSP INTERNAL STATUS MONITOR
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- VDD : PLL
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O Audio DAC FS Output
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Description
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