Block Diagram - Video Section - Sony HCD-V5500 Service Manual

HCD-V5500
6-2. BLOCK DIAGRAM — VIDEO SECTION —
BUFFER
IC501 (1/2)
BCK 9 11 112
B
ADATA 8 12 111
CD-ROM
DECODER
LRCK 7 13 110
6 14 109
C2PO
CD
384FS
SECTION
5 15 103
(Page 14 )
ADATA
MPEG
100
LRCK AUDIO
101
DECODER
BCLK
102
2 XTL0O
X202
28.63636MHz
3 XTL01
106 XTL2O
X201
D-RAM INTERFACE
45.1584MHz
107
XTL2I
38–43 46–55 • 17–21 23 24 32 33 • • • •
2–5 7–10 35–38 40–43 • • • 18–21 24–28 •
D-RAM
IC251
S-RAM
IC751
22
11–13 15–19 • 2–10 21 23–25 • •
DATA
CLK
AMUTE
12
4 16
IC501
(2/2)
13 – 20 21–29 • 31–35 55
384FS
DATA 73 DATA
CLK 78 CLK
74 AMUTE
AMUTE
SQCK 11 SQCK
B
10
SUBQ SUBQ
SCLK 77 SCLK
76 XLT
XLT
CD
LDON 75 LDON
SECTION
71
(Page 14 ) SCOR SCOR
SENS 62 SENS
XRST
48 RESET
16
MPEG DECODER
IC201
71
Y0-Y7
Y 74
•
VIDEO
76
MPEG MPEG
POSTPROCESSOR
SYSTEM VIDEO
80
&
DECODER DECODER
C0-C7
SYNC GENERATOR 63
C
70
XSGRST
97
95
HSYNC
92
VSYNC
93
FID
94
DCLK
89
XOSDEN
56
OSD B
57
OSD G
58
OSD R
59
EACH CIRCUIT BLOCK
XRST
HOST INTERFACE 118
34 35 37 7–13 16 5 6 • • 119 120 • 114 116 115 117
•
D0 A0
D7 A3
OSD B
OSD G
16 15 30 31
OSD R
XOSDEN
VSYNC
HSYNC
CLOCK
DCLK
GENERATOR
IC272
XTCS
IC772
20 27
8 6
10 9 5 4
11 3
1 2
13
IC771
41 40 54 56 43 70 7 8
CMD0 1
CMD1 2
CMD2 3
CMD3 4
5
SACK
MECHA CONTROL QINT 6
IC701
MREQ 72
S601
SYSTEM SELECT
NPIN 64
51 52
X701
10MHz
— 15 —
NOISE REDUCTION
IC301
1 1
60
4 Y 4
• •
67 DEMPX, LEVEL
6 6
RGB-YUV NOISE YUV-RGB TRANSLATOR
9 9
CONV. REDUSER CONV. &
11 51 11 INTERPOLTATOR
C
18 58 18
CLOCK GENARATOR
TIMING DRAM
IC402
GEN.
3 4 5
MEMORY
CONT.
NR-XCS
29
MCLK
X401
IF 30
MDATA
27MHz
31
CT401
98 97 100
13.5MHZ
OSD
IC271
4
18
DATA INPUT MDATA
OUTPUT VIDEO 3
SHIFT
17 OS-XLAT
CONT. RAM
2
RESISTOR
16
MCLK
1
15
DISPLAY
SYNC DATA
19
POSITION
CONT. SEL.
CONT.
20
OSC
8
6.75MHz
1 CK 1/2 Q 5
384FS
ADATA
LRCK
BCLK
DATA
CLK
DF-XLAT
AMUTE
47 48 49 68
34 CMD0
35 CMD1
36 CMD2
37 CMD3
44
SACK
IIC INTERFACE
18 QINT
IC901
43 MREQ
XRST
RESET 15
IIC-DATA 55
PAL
IIC-CLK 56
AUTO
52 10 11
NTSC
X901
5MHz
10BIT VIDEO D/A CONVERTER
IC401
VIDEO AMP
IC451
V
24 5
Y, C/Y, U, V
LPF
SELECTOR
MODULATOR
&
Y
29 5
LPF
INTER-
POLATOR
C
DELAY 32 3
Y/C AMP
IC452
SYNC SUB CLOSED
SLOPE CARRIER CAPTION
GEN. GEN. ENCODER
6
56
1
SYNC GEN.
2
3
SIO & I O-BUS
1/2
&
CONT.
TIMING CONT.
57 55 51 62 59 60 48 49 50
• R CH: Same as L ch
• SIGNAL PATH
: VIDEO
: Y
: CHROMA
: CD
DIGITAL FILTER & D/A CONVERTER
IC101
21
TIMING CLOCK
6
CIRCUIT GENERATOR
22
BUFFER
IC181
27
13 11 11
25
D/A
INPUT PLM
4 6 12
CONV.
16
18
1 3 10
3
MUTE
4 MODE
CIRCUIT
5
2
1
CD FUNC
L CH
XRST
IIC-DATA
IIC-CLK
— 16 —
7
7
1 4 3
J603
S VIDEO OUT
J601
Q601
7 MONITOR OUT
2
IC601
SELECTOR
VIDEO IN
X101
33.8688MHz
ACTIVE LPF
IC102
2
1 6 7
3
R CH
A
MAIN
SECTION
(Page 17)