Sony HCD-V5500 Service Manual page 28

• IC701 MECHANISM CONTROL (HD6433032SK12F)/VIDEO board
Pin No. Pin Name I/O
1 CMD0 I/O
2 CMD1 I/O
3 CMD2 I/O
4 CMD3 I/O
5 SACK O
6 QINT O
7 VDAC-XLAT O
8 DF-XLAT O
9 P90/TXD —
10 SUBQ
11 SQCK O
12 VSS —
13 to 20 D0 to D7 I/O
21 VCC —
22 to 29 A0 to A7 O
30 VSS —
31 to 35 A8 to A12 O
36 to 39 A13 to A16 O
40, 41 A17, A18 O
42 A19 O
43 WAIT
44 MD0
45 MD1
φ
46 O
47 STBY
48 RESET
49 NM1
50 VSS —
51 EXTAL
52 XTAL
53 VCC —
54 AS O
55 RD O
56 WR O
57 RESO O
58 AVSS —
59 TEST0
60 TEST1
61 TE
62 SENS
63 DAC-SELECT
64 NPIN
65 VSS —
66 VREQ
67 VREF
Input/output terminal exchanging data bus 0 with IIC interface (IC901)
Input/output terminal exchanging data bus 1 with IIC interface (IC901)
Input/output terminal exchanging data bus 2 with IIC interface (IC901)
Input/output terminal exchanging data bus 3 with IIC interface (IC901)
Outputs command acknowledge to IIC interface (IC901)
Outputs command output pulses to IIC interface (IC901)
Serial data latch pulse output to Video D/A converter (IC401)
Serial data latch pulse output to Audio D/A converter (IC101)
Not used
I Sub Q 80bit input (CXD2545Q)
SQSO readout clock output (CXD2545Q)
Ground
Data bus input/output (IC201, 751)
Connect to the power supply (+5V)
Address bus output (IC201, 751)
Ground
Address bus output (IC201, 751)
Address bus output (Not used)
Addres bus output (IC772)
Address bus output (Not used)
I BUS control wait input (IC201)
I Operation mode setting terminal (Connected to +5V)
I Operation mode setting terminal (Connected to ground)
System clock output (Not used)
Shifts to the hardware standby mode when the standby terminal becomes "Low".
I
(Unable to use H level fixed) (Connected to +5V)
I Set into reset when the reset input pin becomes "Low". (IC901)
I Requests mask disable interruption. (Unable to use H level fixed) (Connected to +5V)
Ground
I Connected to the Crystal oscillator. The EXTAL pin is also able to input external clocks. (10 MHz)
I Connected to the Crystal oscillator. (10 MHz)
Power supply (+5V)
When the address strobe pin is "Low", indicates that address outputs on the address bus are valid. (IC772)
When the read pin is "Low", indicates that the external addresses space is in the read state. (IC201, 751)
When the read pin is "Low", indicates that the external addresses space is in the write state and the data bus are
valid. (IC201, 751)
Reset output (Not used)
A/D converter (Pin62-69) ground
I Color-bar test input ("L" = test)
I AFADJ test input ("L" = test)
I ADJ test input ("L" = test)
I Internal state (SENSE) monitor input (CXD2545Q)
I Audio D/A converter select mode setting terminal (Connected to +5V)
I NTSC/PAL output mode setting terminal (0V : NTSC, 1.5V : AUTO, 3V : PAL)
Ground
I Not used
I A/D converter (Pin62-69) reference voltage input (Connected to +5V)
Description
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