Pin No.
Pin Name
I/O
41
MD9
I/O
42
MD5
I/O
43
MD10
I/O
44
VDD
—
45
VSS
—
46
MD4
I/O
47
MD11
I/O
48
MD3
I/O
49
MD12
I/O
50
MD2
I/O
51
MD13
I/O
52
MD1
I/O
53
MD14
I/O
54
MD0
I/O
55
MD15
I/O
56
XOSDEN
I
57
OSDB
I
58
OSDG
I
59
OSDR
I
60
VDD
—
61
VSS
—
62
XVOE
I
63
R/Cr0
O
64
R/Cr1
O
65
R/Cr2
O
66
R/Cr3
O
67
R/Cr4
O
68
R/Cr5
O
69
R/Cr6
O
70
R/Cr7
O
71
G/Y0
O
72
G/Y1
O
73
G/Y2
O
74
VDD
—
75
VSS
—
76
G/Y3
O
77
G/Y4
O
78
G/Y5
O
79
G/Y6
O
80
G/Y7
O
Data input/output signal pin. Connect to the DRAM data pin so that the lower and upper bytes of
the data correspond to the CAS0 to CAS3 controls.
+5V power supply
Ground
Data input/output signal pin. Connect to the DRAM data pin so that the lower and upper bytes of
the data correspond to the CAS0 to CAS3 controls.
OSD enable signal
OSD data input pin. When the XOSDEN input is "L", the color registered in the register specified by
this 3 inputs (3 bits) is output as the image data.
+5V power supply
Ground
Video output enable signal pin. When set to "L", enables the image data output and DCLK output. When set to
"H", disables (high impedance). Output control can also be performed by writing in the register. (Connected to
ground)
Output pin of the R or Cr signal of the image data. MSB is R/Cr7. Synchronizes with DCLK.
Output pin of the G or Y signal of the image data. MSB is G/Y7. Synchronizes with DCLK.
+5V power supply
Ground
Output pin of the G or Y signal of the image data. MSB is G/Y7. Synchronizes with DCLK.
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Description