Diagrams; Block Diagram - Cd Section - Sony HCD-V5500 Service Manual

SECTION 6

DIAGRAMS

6-1. BLOCK DIAGRAM — CD SECTION —
OPTICAL PICK-UP
BLOCK (KSS-213B/S-N)
RF AMP
LASER
IC103
DIODE
LD
POWER
PD
APC LD
2
AMP
19
LD
LD
DRIVE 1
Q101
DETECTOR
E
3
RF
4
4
A C RF FQ
SUMMING 16
AMP
B D 5
AMP
6
F
FOCUS
ERROR
15
AMP
1
TRACKING
8
ERROR 13
9
AMP
VC
10 11
VC
12
BUFFER
FOCUS/TRACKING COIL DRIVE
SPINDLE/SLED MOTOR DRIVE
IC102
T+
1
TRACKING
COIL
4
T–
2
5
F+
16
FOCUS
COIL
19
F–
17
20
13
M102
SLED
M
10
MOTOR
12
9
27
M101
SPINDLE
M
23
MOTOR
26
24
MUTE 15
16
DIGITAL SERVO
DIGITAL SIGNAL PROCESSOR
IC101
ASY0
39
RF
INTEGRATOR
RF AC
36
ASY1
ASYMMETRY
38 MIX
CORRECTION
FOK
MIRR
DFCT DFCT
FOK
DETECTOR MIRR
VC
RF DC
26
TE
27
A/D
SE
INTE- CONVERTER
28
GRATOR
FE
29
TFDR
4
TRDR
6
FFDR
8
FRDR
10
SRDR
2
SFDR
100
MDP
96
— 13 —
62
PRIORITY
EMCODER
ADDRESS
CLOCK
GENERATOR
GENERATOR
32K
RAM
D/A
EFM
DATA
REGISTER
DEMODULATOR
PROCESSOR
DIGITAL
PLL
SYNC
PROTECTOR
ERROR
CORRECTOR
TIMING
GENERATOR 1
CLV SERVO TIMING
PROCESSOR GENERATOR 2
SERVO DSP
FOCUS
SERVO
1B TIMS
TRACKING
OVERSAMPLING
SERVO
FILTER
SLED
SERVO
NOISE
SHAPER
PWM
GENERATOR
TRACKING
PWM
GENERATOR
79
FOCUS
PWM
GENERATOR
SLED
PWM
GENERATOR
— 14 —
+5V
MD2
70
DOUT
71
DIGITAL
EXCK
OUT 76
SUBCODE
P-W
SBSO
PROCESSOR
75
SUBQ
77
SUBCODE
PEAK
Q
DETECTOR
SQCK
PROCESSOR
78
SCLK
83
SERIAL/PARALLEL
PROCESSOR
DATA
46
LRCK 45
BCLK 47
SCOR
74
WFCK
73
DATA
86
CPU XLT
87
INTERFACE
CLK
88
SERVO
SENS
AUTO
80
SEQUENCER
C2PO 56
SERVO
INTERFACE
FOK
93
DFCT
92
MIRR
91
XRST 81
54 99
S101
LIMIT
SWITCH
+5V
• SIGNAL PATH
: CD
: DIGITAL OUT
: VIDEO
HCD-V5500
IC107
DIGITAL
OUT
OPTICAL
1
LDON
384BD
EXCK
SUBQ
SUBQ
SQCK
SCLK
ADATA
LRCK
BCLK
SCOR
B
DATA
VIDEO
XLT
SECTION
CLK
(Page 15 )
SENS
C2PO
XRST
AMUTE