Table 2-7 Lvds 24-Bit Tft Single Pixel Per Clock (Single Channel) Signal Mapping - AMD 780E Technical Reference Manual

LVDS

Table 2-7 LVDS 24-bit TFT Single Pixel per Clock (Single Channel) Signal Mapping

TX Signal
LP1C1
LP1C2
LP1C3
LP1C4
LP1C5
LP1C6
LP1C7
LP2C1
LP2C2
LP2C3
LP2C4
LP2C5
LP2C6
LP2C7
LP3C1
LP3C2
LP3C3
LP3C4
LP3C5
LP3C6
LP3C7
LP4C1
LP4C2
LP4C3
LP4C4
LP4C5
LP4C6
LP4C7
© 2009 Advanced Micro Devices, Inc.
Proprietary
24-bit
R0
R1
R2
R3
R4
R5
G0
G1
G2
G3
G4
G5
B0
B1
B2
B3
B4
B5
HSYNC
VSYNC
ENABLE
R6
R7
G6
G7
B6
B7
Reserved
45732 AMD 780E Databook 3.10
2-11