Default Processor Memory Map; Table 1-2. Default Processor Memory Map - Motorola MVME2300 Series Programmer's Reference Manual

Board Description and Memory Maps
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Default Processor Memory Map

Processor Address
Start
0000 0000
8000 0000
8002 0000
FEF8 0000
FEF9 0000
FEFF 0000
FF00 0000
FFF0 0000
1-8
After a reset, the Raven ASIC and the Falcon chip set provide the default
processor memory map as shown in the following table.

Table 1-2. Default Processor Memory Map

Size
End
7FFF FFFF 2G
8001 FFFF 128K
FEF7 FFFF 2G - 16M -
640K
FEF8 FFFF 64K
FEFE FFFF 384K
FEFF FFFF 64K
FFEF FFFF 15M
FFFF FFFF 1M
Notes
1. This default map for PCI/ISA I/O space allows software to
determine whether the system is MPC105-based or Falcon/Raven-
based by examining either the PIB Device ID or the CPU Type
register.
2. The first Megabyte of ROM/Flash bank A appears at this range after
a reset if the rom_b_rv control bit is cleared. If the rom_b_rv control
bit is set, then this address range maps to ROM/Flash bank B.
Definition
Not mapped
PCI/ISA I/O Space
Not mapped
Falcon Registers
Not mapped
Raven Registers
Not mapped
ROM/Flash Bank A or Bank B
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