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ADU
b) Linear velocity is changed to high speed
when the trailing edge of the paper conveyed
at low speed by M5 passes the nip of the fix-
ing roller. Then M5 rotates backward at high
speed and the paper is conveyed to the paper
exit roller after a specified interval since the
trailing edge of the paper turns OFF PS57.
(3) ADU conveyance
a) When SD2 is turned OFF, the paper reverse
gate opens to feed paper to the conveyance
path in the paper reverse and exit section just
like paper reverse and exit operation.
b) Linear velocity is changed to high speed and
conveys the paper when the trailing edge of
the paper conveyed at low speed passes the
fixing nip.
c) Then rotates at high speed by M7 and draws
the paper into the ADU reversal unit.
c.
M10 (paper exit) control
M10 rotates at low speed after a specified inter-
val since the start button is turned ON. During
reversal paper exit, the paper reversed by M5 is
ejected. During this time, linear velocity is
reduced from high speed to low speed when
PS57 is turned OFF by the trailing edge of the
paper. (Model equipped with FNS keeps ejecting
at high speed.) Paper is conveyed at low speed
during straight paper exit.
2. Signals
a.
Input signals
(1) PS2 (PS2 to PRCB)
Detection of paper passage at fixing unit exit.
[L]: Paper exists
[H]: Paper does not exist
(2) PS3 (PS3 to PRCB)
Detection of jam in fixing unit.
[L]: Paper exists. (Jam is detected.)
[H]: Paper does not exist. (Jam is not detected.)
(3) PS61 (PS61 to PRCB)
Detection of paper passage in ejection section.
[L]: Paper exists
[H]: Paper does not exist
(4) PS8, SIG (PS8 to ADUSB to PRCB)
Detection of paper passage in reversal/convey-
ance section.
[L]: Paper exists
[H]: Paper does not exist
(5) PS57 (PS57 to ADUSB to PRCB)
Reverse and eject control reference timing sig-
nal.
The leading edge or trailing edge of paper is
detected.
[L]: Paper exists
[H]: Paper does not exist
b.
Output signals
(1) M10 DRIVE A, A (PRCB to M10)
M10 A-phase drive control clock signal.
(2) M10 DRIVE B, B (PRCB to M10)
M10 B-phase drive control clock signal.
(3) M5 DRIVE A, A (ADUSDB to M5)
M5 A-phase drive control clock signal.
(4) M5 DRIVE B, B (ADUSDB to M5)
M5 B-phase drive control clock signal.
2-N-12
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