Sharp MZ-80B Owner's Manual page 123

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4.0 PROGRAMMING THE PIO
4.1 RESET
The Z-80A-PIO automatically enters a reset state when power is applied . The reset state performs the following
functions :
1) Both port mask registers are reset to inhibit all port data bits.
2) Port data bus lines are set to a high impedance state and the Ready "handshake" signals are inactive (low).
Mode 1 is automatically selected.
3) The vector address registers are not reset.
4) Both port interrupt enable flip flops are reset .
5) Both port output registers are reset.
In addition to the automatic power on reset , the PIO can be reset by applying an M 1 signal without the presence of
a RD or IORQ signal. If no RD or IORQ is detected during M1 the PIO will enter the reset state immediately after the
M1 signal goes inactive . The purpose of this reset is to allow a single external gate to generate a reset without a power
down sequence. This approach was required due to the 40 pin packaging limitation.
Once the PIO has entered the internal reset state it is held there until the PIO receives a control word from the
CPU.
4.2 LOADING THE INTERRUPT VECTOR
The PIO has been designed to operate with the Z-80A-CPU using the mode 2 interrupt response . This mode re-
quires that an interrupt vector be supplied by the interrupting device . This vector is used by the CPU to form the
address for the interrupt service routine of that port. This vector is placed on the Z-80A data bus during an interrupt
acknowledge cycle by the highest priority device requesting service at that time . (Refer to the Z-80A-CPU Technical
Manual for details on how an interrupt is serviced by the CPU). The desired interrupt vector is loaded into the PIO by
writing a control word to the desired port of the PIO with the following format:
D7 D6 Ds D4 D3 D2 Dl Do
v7 v6 Ys
v4
v3
v2
VI
I
0
Zsignifies this control word is an interrupt vector
D
0
is used in this case as a flag bit which when low causes V 7 thru V
1
to be loaded into the vector register. At interrupt
acknowledge time, the vector of the interrupting port will appear on the Z-80A data bus exactly as shown in the format
above .