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ZT 89CT04
Ziatech Corporation ZT 89CT04 Manuals
Manuals and User Guides for Ziatech Corporation ZT 89CT04. We have
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Ziatech Corporation ZT 89CT04 manual available for free PDF download: Hardware User Manual
Ziatech Corporation ZT 89CT04 Hardware User Manual (149 pages)
Single Board 386 EX Computer
Brand:
Ziatech Corporation
| Category:
Motherboard
| Size: 1.11 MB
Table of Contents
Table of Contents
2
Manual Organization
6
1 Introduction
8
Product Definition
8
Zt 89Ct04
9
Stand Alone
9
Std 32 Single Master
9
Std 32 Multiple Master
9
Features
10
Development Considerations
11
Functional Blocks
11
Std Bus Interface
11
Ex Cpu
12
Memory and I/O Addressing
13
Local Bus Video
13
Serial I/O
13
Ieee 1284 Parallel Port
14
Parallel I/O
14
Interrupts
14
Timers
15
Dma
15
Watchdog Timer
15
Real-Time Clock
15
Keyboard Controller
16
Ac Power-Fail Protection
16
2 Getting Started
17
Unpacking
17
System Requirements
17
Memory Configuration
17
System Ram - 16-Bit Pseudo Static Ram
17
I/O Configuration
19
Connector Configuration
20
Jumper Descriptions
21
Setup
21
System Configuration Overview
21
3 Std Bus Interface
23
Std 32 Operation
23
Std 32 Bus Compatibility
24
Compliance Levels
24
Std Bus Interrupts
24
Maskable Interrupts
25
Non-Maskable Interrupts
26
Reset
27
Multiple Master and Intelligent I/O
27
Multiple Master
27
Intelligent I/O
28
System Requirements
29
Multiple Master Reset
30
4 Interrupt Controller
31
Programmable Registers
31
Interrupt Architecture Initialization Registers (Icw1-Icw4)
34
Operational Registers (Ocw1-Ocw3)
36
Status Registers (Irr, Isr, Ipr)
37
Additional Information
38
5 Counter/Timers
39
Programmable Registers
41
Count Registers and Count Latch
41
Status Register
42
Control Register
43
Additional Information
44
6 Dma Controller
45
Intel 386 Ex Internal Architecture
45
Dma Implementation
47
Dma Transfer Cycles
48
I/O Mapping
48
Dma Controller Operation
48
Programming a Dma Channel
49
Fly-By and Two-Cycle Bus Cycles
49
Ex Dma Controller Registers
50
Pin Mux Configuration
51
Peripheral Connections and Mask
53
Channel 0 Requestor Address Registers
53
Channel 1 Requestor Address Registers
55
Channel 0 Target Address Registers
56
Channel 1 Target Address Registers
58
Channel 0 Byte Count Registers
59
Channel 1 Byte Count Registers
61
Dma Status Register
62
Dma Command Registers
63
Dma Mode Registers
64
Dma Software Request Register
65
Dma Single Channel Mask Register
66
Dma Group Channel Mask
66
Dma Bus Size Register
66
Dma Chaining Register
67
Dma Interrupt Enable Register
68
Dma Interrupt Status Register
68
Dma Overflow Enable Register
69
7 Real-Time Clock
70
Programmable Registers
70
Register a
72
Register B
73
Register C
73
Register D
74
Additional Information
74
8 Serial Controller
75
Zt 8904 Specifics
75
Address Mapping
76
Interrupt Selection
76
Handshake Signals
76
Operation
77
Serial Channel Interface
77
Programmable Registers
78
Baud Rate Divisors
78
Divisor Latch Lsb and Msb
79
Interrupt Control Register
80
Interrupt Status Register
81
Line Control Register
82
Line Status Register
83
Modem Control Register
83
Modem Status Register
84
Additional Information
84
9 Centronics Printer Interface
85
Programmable Registers
85
Line Printer Data Register
85
Line Printer Status Register
85
Line Printer Control Register
86
Additional Information
86
10 Parallel I/O
87
Functional Description
87
Output Latch
88
Output Buffer
88
Input Buffer
89
Programmable Registers
89
16C50A Standard Operating Mode
89
16C50A Enhanced Operating Mode
90
11 System Registers
96
Programmable Registers
96
Additional Information
98
12 Watchdog Timer
99
Watchdog Timer Operation
99
Programmable Registers
100
Watchdog Timer Clear Register
101
Watchdog Timer Status Register
101
Watchdog Timer Counter Registers
102
Watchdog Timer Reload Registers
103
Additional Information
103
13 Local Bus Video
104
14 Numeric Data Processor
105
15 Programmable Led
106
16 Ac Power Fail
108
Jumper Configurations
109
Jumper Options
109
Jumper Descriptions
111
Specifications
116
Electrical and Environmental Specifications
116
Absolute Maximum Ratings
116
DC Operating Characteristics
116
Battery Backup Characteristics
117
Std Bus Loading Characteristics
117
Mechanical Specifications
120
Card Dimensions and Weight
120
Connectors
121
Connector Descriptions
123
Cables
133
Pia System Setup Considerations
139
Preventing System Latchup
139
Power Supply Sequence Mismatch
140
Signal Level Mismatch
142
Protecting Cmos Inputs
143
Rise Times
143
Inductive Coupling
144
Additional Information
145
Customer Support
146
Technical/Sales Assistance
146
Reliability
146
Returning for Service
146
Ziatech Warranty
147
Trademarks
148
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