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T1
Xilinx T1 Manuals
Manuals and User Guides for Xilinx T1. We have
2
Xilinx T1 manuals available for free PDF download: User Manual, Installation Manual
Xilinx T1 User Manual (54 pages)
Telco Accelerator Card
Brand:
Xilinx
| Category:
Video Card
| Size: 10 MB
Table of Contents
Table of Contents
2
Chapter 1: Introduction
4
Features
5
Overview
6
Chapter 2: Pin Mapping
9
Zynq Ultrascale+ Mpsoc ZU19 Pin Map
9
Zynq Ultrascale+ Rfsoc ZU21 Pin Map
19
Satellite Controller Pin Map
28
Chapter 3: Ports
31
SFP28 Ports
31
Maintenance Port for UART and JTAG Access
31
IEEE 1588 Support
32
PCI Express
33
Chapter 4: Clocking
34
IEEE 1588 Clocking
34
Pcie Reference Clock
35
SFP28 Clocks
35
DDR4 SDRAM Reference Clocks
36
MAC to MAC Interface Reference Clock
36
User Clocks
36
Chapter 5: Leds
38
Chapter 6: Xilinx Design Constraints (XDC) File
39
Appendix A: Programming the Devices Using JTAG
40
Flashing the Images to ZU19 Zynq Ultrascale+ Mpsoc QSPI Using SDK
43
Flashing the Images to ZU21 Zynq Ultrascale+ Rfsoc QSPI Using SDK
45
Programming the Bitstreams Directly
46
Flashing the Images Using the Program Flash Application
47
Appendix B: Regulatory Compliance Statements
49
FCC Class a Products
49
Safety
49
EMC Compliance
50
FCC Class a User Information
50
VCCI Class a Statement
51
Appendix C: Additional Resources and Legal Notices
52
Xilinx Resources
52
Documentation Navigator and Design Hubs
52
References
53
Revision History
53
Please Read: Important Legal Notices
53
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Xilinx T1 Installation Manual (48 pages)
Telco accelerator card
Brand:
Xilinx
| Category:
PCI Card
| Size: 11 MB
Table of Contents
Table of Contents
2
Chapter 1: Introduction
4
Minimum System Requirements and Setup
5
Configuring the Pcie Slot Bifurcation
6
Chapter 2: Card Information and Installation
11
Safety Instructions
11
Electrostatic Discharge
11
Before You Begin
11
Installing the Card
12
Chapter 3: Installing Additional Software
13
Chapter 4: T1 Factory Installed Image
14
Flashing the Images in QSPI Using Flash_App
14
Chapter 5: T1 Skeleton Design
16
T1 Skeleton Design on the ZU19 Zynq Ultrascale+ Mpsoc
16
T1 Skeleton Design on the ZU21 Zynq Ultrascale+ Rfsoc
17
T1 Skeleton Design Package
18
Chapter 6: Running the Tests
20
100G Internal Connection between Zynq Ultrascale+ Mpsoc and Zynq Ultrascale+ Rfsoc
21
X 25G External SFP Test
23
ZU19 Zynq Ultrascale+ Mpsoc Pcie Loopback Test
25
ZU21 Zynq Ultrascale+ Rfsoc Pcie Loopback Test
27
DDR Read/Write Tests
29
Test Application Guide and Address Map
32
Chapter 7: Next Steps
33
Chapter 8: Dependencies/Known Issues
34
Appendix A: Programming the Devices Using JTAG
35
Flashing the Images to ZU19 Zynq Ultrascale+ Mpsoc QSPI Using SDK
38
Flashing the Images to ZU21 Zynq Ultrascale+ Rfsoc QSPI Using SDK
40
Programming the Bitstreams Directly
41
Appendix B: Regulatory Compliance Statements
43
FCC Class a Products
43
Safety
43
EMC Compliance
44
FCC Class a User Information
44
VCCI Class a Statement
45
Appendix C: Additional Resources and Legal Notices
46
Xilinx Resources
46
Documentation Navigator and Design Hubs
46
Revision History
46
Please Read: Important Legal Notices
47
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