Sign In
Upload
Manuals
Brands
PLX Technology Manuals
Microcontrollers
PEX 8647-AA RDK
PLX Technology PEX 8647-AA RDK Manuals
Manuals and User Guides for PLX Technology PEX 8647-AA RDK. We have
1
PLX Technology PEX 8647-AA RDK manual available for free PDF download: Hardware Reference Manual
PLX Technology PEX 8647-AA RDK Hardware Reference Manual (28 pages)
Brand:
PLX Technology
| Category:
Microcontrollers
| Size: 0 MB
Table of Contents
Table of Contents
4
1 General Information
6
PEX 8647 Features
6
Figure 1-1. PEX 8647-AA RDK Component Side View
6
PEX 8647-AA RDK Features
7
2 PEX 8647-AA RDK Hardware Architecture
8
Figure 2-1. PEX 8647-AA RDK Hardware Architecture
9
PCI Express Gen 2 Connections
10
Figure 2-2. PCI Express Gen 2 Connections
10
PEX 8647 PCI Express Gen 2 Switch
10
PCI Express Card Edge P1
11
PCI Express Connector SLOT 1
11
PCI Express Connector SLOT 2
11
PCI Express Slot Connectors
11
Reference Clock Circuitry
11
Figure 2-3. PEX 8647-AA RDK Reference Clock Circuit
11
Reset Circuitry
12
Serial EEPROM
12
I 2 C Interface
12
Power Distribution
12
Figure 2-4. PEX 8647-AA RDK Reset Circuit
12
LED Indicators
13
Figure 2-5. PEX 8647-AA RDK Power Subsystem
13
Table 2-1. PEX 8647-AA RDK LED Indicator Descriptions
13
Fatal Error Indication (D13)
14
PEX 8647 Voltage Level Monitoring (D8 - D9)
14
PEX_INTA# Interrupt Indication (D14)
14
Port Link Status Indication (D10 - D12)
14
GPIO Pins
14
Upstream Port Select Pins
14
Table 2-2. Port Link Status LED Functions
14
Table 2-3. Voltage Level Monitoring LED Functions
14
Reserved Pins
15
Table 2-4. Strap_Reserved Pin Connections
15
3 On-Board Connectors, Switches, and Jumpers
16
DIP Switches
16
I 2 C Address Selection (SW2)
16
Push-Button Switches
16
Manual Reset# (S1)
16
Figure 3-1. Switch SW2 Default Settings
16
Table 3-1. Switch SW2 Description
16
Midbus Footprints (JP1 - JP6)
17
Figure 3-2. Midbus 2.0 Footprint Dimensions, Pin Numbering and Specification (Copied from Agilent's Document)
17
Table 3-2. Signal Names of X8 PCI Express Midbus Footprints
17
Header (JP7)
18
JTAG Header (JP8)
18
I 2 C Port (JP9 - JP10)
18
Table 3-3. Midbus Probe Footprints Vs. Lanes of PEX 8647
18
Table 3-4. Pin Assignment of JP8
18
Table 3-5. Pin Assignment of JP9 and JP10
18
Reference Clock Header (J1)
19
ATX HD Power Connector (J2 - J3)
19
Table 3-6. Pin Assignment of J1
19
Table 3-7. Pin Assignment of J1
19
4 Bill of Materials/ Schematics
20
Advertisement
Advertisement
Related Products
PLX Technology PEX 8615A
PLX Technology PEX 8619BA
PLX Technology PEX 8505
PLX Technology PEX 8632-AA
PLX Technology PEX8605
PLX Technology PEX 8616 RDK
PLX Technology PEX 8614AA
PLX Technology PEX8603
PLX Technology PEX 8648
PLX Technology PEX 8647-AA
PLX Technology Categories
Microcontrollers
Computer Hardware
Switch
Network Hardware
Controller
More PLX Technology Manuals
Login
Sign In
OR
Sign in with Facebook
Sign in with Google
Upload manual
Upload from disk
Upload from URL