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Phytec phyCORE-LPC3180 Board Computer Manuals
Manuals and User Guides for Phytec phyCORE-LPC3180 Board Computer. We have
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Phytec phyCORE-LPC3180 Board Computer manuals available for free PDF download: Hardware Manual, Quick Start Instructions
Phytec phyCORE-LPC3180 Hardware Manual (88 pages)
Brand:
Phytec
| Category:
Computer Hardware
| Size: 1 MB
Table of Contents
Table of Contents
3
Preface
9
Introduction
10
Block Diagram
12
Figure 1: Block Diagram Phycore-LPC3180
12
View of the Phycore-LPC3180
13
Figure 2: Top View of the Phycore-LPC3180 (Controller Side)
13
Figure 3: Bottom View of the Phycore-LPC3180 (Connector Side)
14
Pin Description
15
Figure 4: Pinout of the Phycore-Connector (Top View, with Cross Section Insert)
16
Table 1: Pinout of the Phycore-Connector X200
17
Jumpers
25
Figure 5: Numbering of the Jumper Pads
25
Figure 6: Location of the Jumpers (Top View)
26
Figure 7: Location of the Jumpers (Bottom View)
27
Table 2: Jumper Settings
28
Figure 8: Default Jumper Settings on the Phycore-LPC3180 (Top Side)
29
Figure 9: Default Jumper Settings on the Phycore-LPC3180 (Bottom Side)
30
J503 MCKO Signal
31
J504 A/D Positive Supply/Reference Voltage
31
A/D Negative Supply/Reference Voltage
31
Table 3: J503 MCKO Signal Configuration
31
Table 4: J504, A/D Positive Supply/Reference Voltage Selection
31
Power Requirements
32
Real Time Clock and SRAM Battery
32
Table 5: VBAT Operating Limits
32
Real Time Clock and SRAM Power Source (J506)
33
Voltage Supervision (U409)
33
Table 6: J506 Real Time Clock and SRAM Power Source
33
System Configuration
34
Boot Process
34
Figure 10: Small Page SLC NAND Flash Structure
35
Boot Modes
37
Memory Model
38
Table 7: LPC3180 Memory Map
38
System Memory
39
Sdr Sdram (U602, U603)
39
NAND Flash Memory (U600)
39
Table 8: Valid SDRAM Memory Address Ranges
39
Table 9: Compatible NAND Flash Devices
39
NAND Flash Write Protection Control (J604)
40
I²C Eeprom (U601)
40
Table 10: J604, EEPROM Write Protection States
40
Setting the EEPROM Lower Address Bits (J600, J601, J602)
41
EEPROM Write Protection Control (J603)
41
Table 11: J600, J601, J602 EEPROM Lower Address Bits
41
Table 12: J603, EEPROM Write Protection States
41
SIBL, U-Boot and Linux
42
Serial Interfaces
43
RS-232 Transceivers (U301, U302)
43
UART2 Routing Jumpers J300, J301, J302 and J303
43
USB Transceiver (U300)
44
Table 13: J300, J301, J302, J303 High Speed Serial Interface Configuration
44
Processor Independent Watchdog (U408)
45
Setting the Watchdog Timeout Period (J400)
45
Table 14: J400, Processor Independent Watchdog Timeout Period Configuration
45
Interfacing the WDI Watchdog Input (J401)
46
Table 15: J401 First Serial Interface Configuration
46
Debug Interface X201
47
Figure 11: JTAG Interface X201 (Top View)
47
Figure 12: JTAG Interface X201 (Bottom View)
48
Table 16: JTAG Connector X201 Signal Assignment
49
Technical Specifications
50
Figure 13: Physical Dimensions
50
Hints for Handling the Phycore-LPC3180
52
The Phycore-LPC3180 on the Phycore-LPC3180 Carrier Board
53
Phycore-LPC3180 Carrier Board Peripherals
53
Table 17: Carrier Board Connectors
53
Table 18: Carrier Board Buttons
54
Table 19: Carrier Board Leds
54
Table 20: Carrier Board Potentiometers
54
Figure 14: Component Locations on the Phycore-LPC3180 Development Board
55
Jumpers on the Phycore-LPC3180 Carrier Board
56
Figure 15: Typical Jumper Pad Numbering Scheme (Solderless Jumpers)
56
Table 21: Phycore-LPC3180 Carrier Board Jumper Settings
56
Figure 16: Location of the Jumpers (View of the Component Side)
58
Figure 17: Default Jumper Settings of the Phycore-LPC3180 Carrier Board (J300, JP302-304)
59
Figure 18: Default Jumper Settings of the Phycore-LPC3180 Carrier Board (JP300-301, JP307-311, JP400-403)
59
Figure 19: Default Jumper Settings of the Phycore-LPC3180 Carrier Board (JP305-JP306)
60
Carrier Board
61
Power Supply at X304
61
System Reset Button S300
61
Boot Selection Using JP306
61
Figure 20: Supply Voltage Connector Dimensions at X304
61
Accessing UART5 through Socket P300A
62
Accessing UART2 through Socket P300B
62
Table 22: P300A BOOT/RESET Signal Operating Limits
62
SD Card Interface at Connector X300
63
User Buttons S302 and S303
64
User Leds D400, D401, D402, and D403
64
Accessing the USB through Connectors X301, X302, and X303
65
A/D Potentiometer R313
65
Table 23: A/D Potentiometer Output Routing Options
65
Battery Connector BAT300
66
Power Connectors X306 and X307
66
Keyboard Connector at X203
67
Figure 21: Carrier Board Keyboard Connector X203
67
Table 24: Keyboard Connector X203 Signal Assignment
67
Debug Interface X202
68
Figure 22: Carrier Board JTAG Connector X202
68
Table 25: JTAG Connector X202 Signal Assignment
68
Pin Assignment Summary of the Phycore, the Expansion Bus and the Patch Field
69
Figure 23: Pin Assignment Scheme of the Expansion Bus X201
69
Table 26: GPI Pin Assignment for the Phycore-LPC3180 / Carrier Board / Expansion Board
71
Table 27: GPO Pin Assignment for the Phycore-LPC3180 / Carrier Board / Expansion Board
72
Table 28: GPIO Pin Assignment for the Phycore-LPC3180 / Carrier Board / Expansion Board
72
Table 29: SPI Pin Assignment for the Phycore-LPC3180 / Carrier Board / Expansion Board
73
Table 30: SD Card Pin Assignment for the Phycore-LPC3180 / Carrier Board / Expansion Board
73
Table 31: USB Pin Assignment for the Phycore-LPC3180 / Carrier Board / Expansion Board
73
Table 32: JTAG/DEBUG Pin Assignment for the Phycore-LPC3180 / Carrier Board / Expansion Board
74
Table 33: System Pin Assignment for the Phycore-LPC3180 / Carrier Board / Expansion Board
74
Table 34: A/D Pin Assignment for the Phycore-LPC3180 / Carrier Board / Expansion Board
75
Table 35: PWM Pin Assignment for the Phycore-LPC3180 / Carrier Board / Expansion Board
75
Table 36: I²C Pin Assignment for the Phycore-LPC3180 / Carrier Board / Expansion Board
75
Table 37: UART Pin Assignment for the Phycore-LPC3180 / Carrier Board / Expansion Board
76
Table 38: Keyboard Pin Assignment for the Phycore-LPC3180 / Carrier Board / Expansion Board
77
Table 39: Power Pin Assignment for the Phycore-LPC3180 / Carrier Board / Expansion Board
77
Table 40: Carrier Board Generated Signal Pin Assignment for the Phycore-LPC3180 / Carrier Board / Expansion Board
78
Table 41: Unused Pins on the Phycore-LPC3180 / Carrier Board / Expansion Board
78
Revision History
79
Component Placement Diagram
80
Index
83
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Phytec phyCORE-LPC3180 Hardware Manual (80 pages)
Brand:
Phytec
| Category:
Motherboard
| Size: 1 MB
Table of Contents
Table of Contents
3
Preface
9
1 Introduction
10
Block Diagram
12
Figure 1: Block Diagram Phycore-LPC3180
12
View of the Phycore-LPC3180
13
Figure 2: Top View of the Phycore-LPC3180 (Controller Side)
13
Figure 3: Bottom View of the Phycore-LPC3180 (Connector Side)
14
2 Pin Description
15
Figure 4: Pinout of the Phycore-Connector (Top View, with Cross Section Insert)
16
Table 1: Pinout of the Phycore-Connector X200
17
3 Jumpers
25
Figure 5: Numbering of the Jumper Pads
25
Figure 6: Location of the Jumpers (Top View)
25
Figure 7: Location of the Jumpers (Bottom View)
26
Table 2: Jumper Settings
27
J503 MCKO Signal
28
Table 3: J503 MCKO Signal Configuration
28
J504 A/D Positive Supply/Reference Voltage
29
J505 A/D Negative Supply/Reference Voltage
29
Table 4: J504, A/D Positive Supply/Reference Voltage Selection
29
Table 5: J505, A/D Negative Supply/Reference Voltage Selection
29
4 Power Requirements
30
Real Time Clock Battery
30
Table 6: VBAT Operating Limits
30
Real Time Clock Power Source (J506)
31
Voltage Supervision (U409)
31
Table 7: J506 Real Time Clock Power Source
31
5 System Configuration
32
Starting the Phycore-LPC3180 ISP Mode
32
6 System Memory
33
Memory Model
33
Table 8: LPC3180 Memory Map
33
Sdr Sdram (U602, U603)
34
NAND Flash Memory (U600)
34
Table 10: Compatible NAND Flash Devices
34
Table 9: Valid SDRAM Memory Address Ranges
34
NAND Flash Write Protection Control (J604)
35
I²C Eeprom (U601)
35
Setting the EEPROM Lower Address Bits (J600, J601, J602)
35
Table 11: J604, EEPROM Write Protection States
35
EEPROM Write Protection Control (J603)
36
Table 12: J600, J601, J602 EEPROM Lower Address Bits
36
Table 13: J603, EEPROM Write Protection States
36
7 Serial Interfaces
37
RS-232 Transceivers (U301, U302)
37
UART2 Routing Jumpers J300, J301, J302 and J303
37
USB Transceiver (U300)
38
Table 14: J300, J301, J302, J303 High Speed Serial Interface Configuration
38
8 Processor Independent Watchdog (U408)
39
Setting the Watchdog Timeout Period (J400)
39
Table 15: J400, Processor Independent Watchdog Timeout Period Configuration
39
Interfacing the WDI Watchdog Input (J401)
40
Table 16: J401 First Serial Interface Configuration
40
9 Debug Interface X201
41
Figure 8: JTAG Interface X201 (Top View)
41
Figure 9: JTAG Interface X201 (Bottom View)
42
Table 17: JTAG Connector X201 Signal Assignment
43
10 Technical Specifications
44
Figure 10: Physical Dimensions
44
11 Hints for Handling the Phycore-LPC3180
46
12 The Phycore-LPC3180 on the Phycore-LPC3180 Carrier Board
47
Phycore-LPC3180 Carrier Board Peripherals
47
Table 18: Carrier Board Connectors
47
Table 19: Carrier Board Buttons
48
Table 20: Carrier Board Leds
48
Table 21: Carrier Board Potentiometers
48
Figure 11: Component Locations on the Phycor-LPC3180 Development Board
49
Figure 12: Typical Jumper Pad Numbering Scheme (Solderless Jumpers)
50
Jumpers on the Phycore-LPC3180 Carrier Board
50
Table 22: Phycore-LPC3180 Carrier Board Jumper Settings
50
Figure 13: Location of the Jumpers (View of the Component Side) [NEW Image Required Here!]
52
Figure 14: Default Jumper Settings of the Phycore-LPC3180 Development Board with the Phycore-LPC3180 [NEW Image Required Here!]
52
Figure 15: Connecting the Supply Voltage at X304
53
Power Supply at X304
53
Starting the LPC3180 Bootstrap Software
53
Accessing UART2 through Socket P300B
54
Accessing UART5 through Socket P300A
54
Table 23: P300A BOOT/RESET Signal Operating Limits
54
SD Card Interface at Connector X300
55
User Buttons S301 and S302
56
User Leds D305, D306, D309, and D310
56
Accessing the USB through Connectors X301, X302, and X303
57
Figure 16: USB Signal Routing Solder Jumpers
58
Table 24: USB Jumper Configurations for Host/Device/Otg Operation
58
A/D Potentiometer R313
59
Battery Connector BAT300
59
Power Connectors X306 and X307
59
Table 25: A/D Potentiometer Output Routing Options
59
Figure 17: Carrier Board Keyboard Connector X203
60
Keyboard Connector at X203
60
Table 26: Keyboard Connector X203 Signal Assignment
60
Debug Interface X202
61
Figure 18: Carrier Board JTAG Connector X202
61
Expansion Bus and the Patch Field
62
Pin Assignment Summary of the Phycore, the
62
Figure 19: Pin Assignment Scheme of the Expansion Bus X201
63
Figure 20: Pin Assignment Scheme of the Patch Field on the Optional GPIO Expansion Board
64
13 Revision History
73
14 Component Placement Diagram
75
Figure 21: Phycore-LPC3180 Component Placement, Top View
75
Figure 22: Phycore-LPC3180 Component Placement, Bottom View
76
Index
77
Phytec phyCORE-LPC3180 Quick Start Instructions (31 pages)
Brand:
Phytec
| Category:
Computer Hardware
| Size: 0 MB
Table of Contents
Table of Contents
3
Introduction to the Rapid Development Kit
5
Rapid Development Kit Documentation
5
Overview of this Quickstart Instruction
5
System Description
6
Rapid Development Kit Contents
6
Host System Requirements for Downloading Images (Section 3)
7
Host System Requirements for Building New Images (Section 5)
7
The PHYTEC Phycore®-LPC3180
8
LPC3180 Boot Process
8
Getting Started
9
Installing Rapid Development Kit Software
9
Installing PHYTEC Spectrum CD
9
Install the Segger Jlink.exe and J-Link Drivers
10
Interfacing the Phycore®-LPC3180 to a Host-PC
11
Flashing Images
13
Setup
13
Writing Images to Flash
16
Extended Demo: USB-Ethernet
21
Using Ethernet
21
Using MMC/SD Card Devices
23
Getting more Involved
24
Tool Chain Setup
24
Building SIBL
24
Building U-Boot
25
Building Linux Kernel
26
Root File System
27
Mount the File System
27
Add New Application Program to File System
27
Update Loadable Modules
27
File System Workflow
28
Building a New Root File System
28
Building a JFFS2 File System
29
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