User Manuals: IXYS zilog Z51F3220 Microcontroller Unit

Manuals and User Guides for IXYS zilog Z51F3220 Microcontroller Unit. We have 2 IXYS zilog Z51F3220 Microcontroller Unit manuals available for free PDF download: Manual

IXYS zilog Z51F3220 Manual

IXYS zilog Z51F3220 Manual (313 pages)

8-Bit Microcontrollers

Brand: IXYS | Category: Microcontrollers | Size: 10 MB

Table of Contents

Advertisement

IXYS zilog Z51F3220 Manual

IXYS zilog Z51F3220 Manual (312 pages)

8-Bit Microcontrollers

Brand: IXYS | Category: Microcontrollers | Size: 2 MB

Table of Contents

Table of Contents
4
1 Overview

13
- Description
  13
- Features
  14
- Ordering Information
  15
- Table 1-1 Ordering Information of Z51F3220
  15
- Development Tools
  16
2 Block Diagram

19
- Figure 2.1 Block Diagram
  19
3 Pin Assignment

20
- Figure 3.1 Z51F3220 44MQFP-1010 Pin Assignment
  20
- Figure 3.2 Z51F3220 32SOP Pin Assignment
  21
4 Package Diagram

22
- Figure 4.1 44-Pin MQFP Package
  22
- Figure 4.2 32-Pin SOP Package
  23
5 Pin Description

24
- Table 5-1 Normal Pin Description
  24
6 Port Structures

29
7 Electrical Characteristics

31
8 Memory

52
- Program Memory
  52
- Figure 8.1 Program Memory
  53
- Data Memory
  54
- Figure 8.2 Data Memory Map
  54
- Figure 8.3 Lower 128 Bytes RAM
  55
- XRAM Memory
  56
- Figure 8.4 XDATA Memory Area
  56
- SFR Map
  57
- Table 8-1 SFR Map Summary
  57
- Table 8-2 SFR Map Summary
  58
- Table 8-3 SFR Map
  59
9 I/O Ports

66
- Port Register
  66
- Table 9-1 Port Register Map
  67
- P0 Port
  68
- P1 Port
  70
- P2 Port
  72
- P3 Port
  73
- P4 Port
  74
- P5 Port
  75
- Port Function
  76
10 Interrupt Controller

85
11 Peripheral Hardware

102
12 Power down Operation

274
13 Reset

279
- Overview
  279
- Reset Source
  279
- RESET Block Diagram
  279
- Figure 13.1 RESET Block Diagram
  279
- Table 13-1 Reset State
  279
- RESET Noise Canceller
  280
- Power on RESET
  280
- Figure 13.2 Reset Noise Canceller Timer Diagram
  280
- Figure 13.3 Fast VDD Rising Time
  280
- Figure 13.4 Internal RESET Release Timing on Power-Up
  280
- Figure 13.5 Configuration Timing When Power-On
  281
- Figure 13.6 Boot Process Waveform
  281
- Table 13-2 Boot Process Description
  282
- External RESETB Input
  283
- Figure 13.7 Timing Diagram after RESET
  283
- Figure 13.8 Oscillator Generating Waveform Example
  283
- Brown out Detector Processor
  284
- Figure 13.9 Block Diagram of BOD
  284
- Figure 13.10 Internal Reset at the Power Fail Situation
  284
- LVI Block Diagram
  285
- Figure 13.11 Configuration Timing When BOD RESET
  285
- Figure 13.12 LVI Diagram
  285
- Table 13-3 Reset Operation Register Map
  286
14 On-Chip Debug System

289
15 Flash Memory

295
- Overview
  295
- Figure 15.1 Flash Program ROM Structure
  296
- Table 15-1Flash Memory Register Map
  297
16 Configure Option

306
- Configure Option Control
  306
17 Appendix

307

Advertisement

Related Products

IXYS Categories

Microcontrollers Motherboard

Switch

Switch Computer Hardware Media Converter

More IXYS Manuals