IXYS Z8 Encore! Z8F0830 Manuals

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IXYS Z8 Encore! Z8F0830 Product Specification

IXYS Z8 Encore! Z8F0830 Product Specification (256 pages)

High-Performance 8-Bit Microcontrollers

Brand: IXYS | Category: Microcontrollers | Size: 16 MB

Table of Contents

Revision History
3
Table of Contents
4
List of Figures
10
Overview
18
- Features
  18
- Part Selection Guide
  19
- Table 1. Z8 Encore! F0830 Series Family Part Selection Guide
  19
- Block Diagram
  20
- Figure 1. Z8 Encore! F0830 Series Block Diagram
  20
- CPU and Peripheral Overview
  21
  - General Purpose Input/Output
    21
  - Flash Controller
    21
  - Nonvolatile Data Storage
    22
  - Internal Precision Oscillator
    22
  - External Crystal Oscillator
    22
  - 10-Bit Analog-To-Digital Converter
    22
  - Analog Comparator
    22
  - Timers
    22
  - Interrupt Controller
    22
  - Reset Controller
    23
  - On-Chip Debugger
    23
- Acronyms and Expansions
  23
- Table 2. Acronyms and Expansions
  23
Pin Description
24
Address Space
31
Table 8. Register File Address Map
34
Register Map
34
Reset and Stop Mode Recovery
38
Low-Power Modes
47
- STOP Mode
  47
- HALT Mode
  48
- Peripheral Level Power Control
  48
- Power Control Register Definitions
  48
- Table 14. Power Control Register 0 (PWRCTL0)
  49
General Purpose Input/Output
50
Interrupt Controller
70
Timers
85
Watchdog Timer
109
- Operation
  109
- Watchdog Timer Control Register Definitions
  112
Analog-To-Digital Converter
115
- Architecture
  115
- Operation
  116
  - Figure 11. Analog-To-Digital Converter Block Diagram
    116
  - ADC Timing
    117
  - Figure 12. ADC Timing Diagram
    117
  - Figure 13. ADC Convert Timing
    117
  - ADC Interrupt
    118
  - Calibration and Compensation
    118
  - Internal Voltage Reference Generator
    118
  - Reference Buffer
    118
- ADC Control Register Definitions
  118
  - ADC Control Register 0
    119
  - Table 63. ADC Control Register 0 (ADCCTL0)
    119
  - ADC Data High Byte Register
    120
  - ADC Data Low Bits Register
    120
  - Table 64. ADC Data High Byte Register (ADCD_H)
    120
  - Table 65. ADC Data Low Bits Register (ADCD_L)
    120
  - Sample Settling Time Register
    121
  - Table 66. Sample Settling Time (ADCSST)
    121
  - Sample Time Register
    122
  - Table 67. Sample Time (ADCST)
    122
Comparator
123
Flash Memory
125
Flash Option Bits
141
Nonvolatile Data Storage
151
- Operation
  151
- NVDS Code Interface
  151
  - Byte Write
    152
  - Table 91. Write Status Byte
    152
  - Byte Read
    153
  - Table 92. Read Status Byte
    153
  - Power Failure Protection
    154
  - Optimizing NVDS Memory Usage for Execution Speed
    154
  - Table 93. NVDS Read Time
    154
On-Chip Debugger
156
- Architecture
  156
- Figure 20. On-Chip Debugger Block Diagram
  156
- Operation
  157
  - OCD Interface
    157
  - Figure 21. Interfacing the On-Chip Debugger's DBG Pin with an RS-232 Interface
    157
  - DEBUG Mode
    158
  - Figure 22. Interfacing the On-Chip Debugger's DBG Pin with an RS-232 Interface
    158
  - OCD Data Format
    159
  - OCD Autobaud Detector/Generator
    159
  - Figure 23. OCD Data Format
    159
  - Table 94. OCD Baud-Rate Limits
    159
  - OCD Serial Errors
    160
  - Breakpoints
    160
  - Runtime Counter
    161
- On-Chip Debugger Commands
  161
- Table 95. On-Chip Debugger Command Summary
  161
- On-Chip Debugger Control Register Definitions
  165
  - OCD Control Register
    165
  - Table 96. OCD Control Register (OCDCTL)
    166
  - OCD Status Register
    167
  - Table 97. OCD Status Register (OCDSTAT)
    167
Oscillator Control
168
Crystal Oscillator
174
With a 45 Kω Resistor
177
Internal Precision Oscillator
178
- Operation
  178
Ez8 CPU Instruction Set
179
Figure 28. Op Code Map Cell Description
197
Op Code Maps
197
Table 114. Op Code Map Abbreviations
198
Figure 29. First Op Code Map
199
Figure 30. Second Op Code Map after 1FH
200
Electrical Characteristics
201
Packaging
216
Ordering Information
217
Appendix A. Register Tables
225
Index
248
Customer Support
256

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