Freescale Semiconductor MC13192 Manuals

Manuals and User Guides for Freescale Semiconductor MC13192. We have 2 Freescale Semiconductor MC13192 manuals available for free PDF download: Reference Manual, Technical Data Manual

Freescale Semiconductor MC13192 Reference Manual (128 pages)

2.4 GHz Low Power Transceiver for the IEEE 802.15.4 Standard

Brand: Freescale Semiconductor | Category: Transceiver | Size: 1 MB

Table of Contents
3
Audience
9
Organization
9
Revision History
10
Conventions
10
Definitions, Acronyms, and Abbreviations
10
References
11
Chapter 1 Introduction

13
- Introduction
  13
- Features
  14
- Software Support
  14
- 802.15.4 Standard-Compliant MAC
  15
- Block Diagrams
  15
- Simple MAC (SMAC)
  15
- Zigbee-Compliant Network Stack (Beestack)
  15
- Data Transfer Modes
  16
- Packet Structure
  16
- Receive Path Description
  17
- Transmit Path Description
  17
Chapter 2 MC13192 Pins and Connections

19
- Device Pin Assignment
  19
- Pin Definitions
  20
Chapter 3 System Considerations

23
Chapter 4 SPI Register Descriptions

39
- Mandatory Register Initialization
  39
- Overview
  39
- Register Model and Description Details
  40
- Reset - Register 00
  43
- Rx_Pkt_Ram - Register 01
  43
- Tx_Pkt_Ram - Register 02
  44
- Tx_Pkt_Ctl - Register 03
  45
- Cca_Thresh - Register 04
  46
- Irq_Mask - Register 05
  47
- Control_A - Register 06
  49
- Control_B - Register 07
  51
- Pa_Enable - Register 08
  52
- Control_C - Register 09
  53
- Clko_Ctl - Register 0A
  54
- Gpio_Dir - Register 0B
  55
- Gpio_Data_Out - Register 0C
  57
- Lo1_Int_Div - Register 0F
  58
- Lo1_Num - Register 10
  59
- Pa_Lvl - Register 12
  60
- Tmr_Cmp1_A - Register 1B
  61
- Tmr_Cmp1_B - Register 1C
  61
- Tmr_Cmp2_A - Register 1D
  63
- Tmr_Cmp2_B - Register 1E
  63
- Tmr_Cmp3_A - Register 1F
  65
- Tmr_Cmp3_B - Register 20
  65
- Tmr_Cmp4_A -Register 21
  67
- Tmr_Cmp4_B - Register 22
  67
- Tc2_Prime - Register 23
  69
- Irq_Status - Register 24
  70
- Rst_Ind - Register 25
  72
- Current_Time_A - Register 26
  73
- Current_Time_B - Register 27
  73
- Gpio_Data_In - Register 28
  74
- Chip_Id - Register 2C
  75
- Rx_Status - Register 2D
  75
- Timestamp_A - Register 2E
  76
- Timestamp_B - Register 2F
  76
- Ber_Enable - Register 30
  77
- Psm_Mode - Register 31
  78
Chapter 5 Serial Peripheral Interface (SPI)

79
Chapter 6 Modes of Operation

89
- Operational Modes Summary
  89
- Doze Mode
  92
- Hibernate Mode
  92
- Low Power Modes
  92
- Normal Doze Mode
  92
- Off Mode
  92
- Acoma Doze Mode
  93
- Active Modes
  93
- Idle Mode
  93
- Controlling Transition to Other Active Modes from Idle
  94
- Packet Mode Data Transfer TX and RX Operation
  94
- Packet Receive Mode
  95
- Aborting a Packet Receive Sequence
  96
- Packet Transmit Mode
  96
- Stream Mode Data Transfer TX and RX Operation
  97
- Stream Receive Mode
  99
- Aborting a Stream Receive Mode Sequence
  100
- Stream Transmit Mode
  101
- Clear Channel Assessment (CCA) Modes (Including Link Quality Indication)
  102
- Clear Channel Assessment Function (Use_Strm Is Zero)
  102
- Energy Detect Function (Use_Strm Is Zero)
  105
- CCA / ED While in Stream Mode (Use_Strm Is One)
  106
- Frequency of Operation
  106
- Link Quality Indication
  106
- Transmit Power Adjustment
  107
- Ghz PLL Out-Of-Lock Interrupt
  108
Chapter 7 Timer Information

109
- Event Timer Block
  109
- Event Timer Time Base
  110
- Setting Current Time
  110
- Event Timer Comparators
  111
- Latching the Timestamp
  111
- Reading Current Time
  111
- Timer Compare Fields
  111
- Timer Disable Bits
  112
- Timer Interrupt Masks
  112
- Timer Status Flags
  112
- Generating Time-Based Interrupts
  113
- Intended Event Timer Usage
  113
- Setting Compare Values
  113
- Timer-Triggered Transceiver Events
  114
- Using Tmr_Cmp2[23:0] to Exit Doze Mode
  114
- Packet Mode Timer_Triggered TX or RX Events
  115
- Stream Mode Timer_Triggered TX or RX Events
  115
Chapter 8 Interrupt Description

117
- Interrupts
  117
- Interrupt Sources
  118
- Output Pin IRQ
  119
- Programming IRQ Pullup
  119
- Setting IRQ Output Drive Strength
  119
- Attn_Irq Status Bit and Interrupt Operation
  120
- Exiting off Mode (Reset)
  120
- Interrupts from Exiting Low Power Modes
  120
- Pll_Lock_Irq Status Bit and Operation
  120
- Exiting Doze Mode(S)
  121
- Exiting Hibernate Mode
  121
Chapter 9 Miscellaneous Functions

123
- Input Pin RST
  123
- Reset Function
  123
- Reset Indicator Bit (Rst_Ind Register 25, Bit 7)
  123
- Software Reset (Writing to Register 00)
  123
- Configuring GPIO Direction
  124
- General Purpose Input/Output
  124
- Programming GPIO Output Value
  124
- Setting GPIO Output Drive Strength
  124
- Crystal Oscillator
  125
- GPIO1 and GPIO2 as Status Indicators
  125
- Reading GPIO Input State
  125
- Crystal Requirements
  126
- Crystal Trim Operation
  126
- Enable CLKO (Clko_En, Control_C Register 09, Bit 5)
  127
- Enable CLKO During Doze Mode (Clko_Doze_En, Control_B Register 07, Bit 9)
  127
- Output Clock Pin CLKO
  127
- Setting CLKO Frequency (Clko_Rate[2:0], Clko_Ctl Register 0A, Bits 2-0)
  127
- Input Pin ATTN
  128
- Setting CLKO Output Drive Strength
  128

Freescale Semiconductor MC13192 Technical Data Manual (22 pages)

2.4 GHz Low Power Transceiver for the IEEE 802.15.4 Standard

Brand: Freescale Semiconductor | Category: Transceiver | Size: 0 MB

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Motherboard Computer Hardware Microcontrollers Control Unit Controller

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Freescale Semiconductor MC13192 Manuals

Freescale Semiconductor MC13192 Reference Manual (128 pages)

Table of Contents

Chapter 1 Introduction

Chapter 2 MC13192 Pins and Connections

Chapter 3 System Considerations

Chapter 4 SPI Register Descriptions

Chapter 5 Serial Peripheral Interface (SPI)

Chapter 6 Modes of Operation

Chapter 7 Timer Information

Chapter 8 Interrupt Description

Chapter 9 Miscellaneous Functions

Freescale Semiconductor MC13192 Technical Data Manual (22 pages)

Table of Contents

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