Freescale Semiconductor MC13192 Technical Data Manual

2.4 ghz low power transceiver for the ieee 802.15.4 standard
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Freescale Semiconductor
Technical Data
MC13192/MC13193
2.4 GHz Low Power Transceiver
®
for the IEEE

1 Introduction

The MC13192 and MC13193 are short range, low
power, 2.4 GHz Industrial, Scientific, and Medical
(ISM) band transceivers. The MC13192/MC13193
contain a complete 802.15.4 physical layer (PHY)
modem designed for the IEEE
standard which supports peer-to-peer, star, and mesh
networking.
The MC13192 includes the 802.15.4 PHY/MAC for use
with the HCS08 Family of MCUs. The MC13193 also
includes the 802.15.4 PHY/MAC plus the ZigBee
Protocol Stack for use with the HCS08 Family of MCUs.
With the exception of the addition of the ZigBee Protocol
Stack, the MC13193 functionality is the same as the
MC13192.
When combined with an appropriate microcontroller
(MCU), the MC13192/MC13193 provide a
cost-effective solution for short-range data links and
networks. Interface with the MCU is accomplished using
a four wire serial peripheral interface (SPI) connection
and an interrupt request output which allows for the use
of a variety of processors. The software and processor
Freescale reserves the right to change the detail specifications as may be required to permit improvements in the design of its
products.
© Freescale Semiconductor, Inc., 2004. All rights reserved.
802.15.4 Standard
®
802.15.4 wireless
MC13192/MC13193
(Scale 1:1)
Package Information
Plastic Package
Case 1311-03
(QFN-32)
Ordering Information
Device
Device Marking
MC13192
MC13193
Contents
1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . 1
2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
3 Block Diagrams . . . . . . . . . . . . . . . . . . . . . . . 3
4 Data Transfer Modes . . . . . . . . . . . . . . . . . . . 3
5 Electrical Characteristics . . . . . . . . . . . . . . . 8
6 Functional Description . . . . . . . . . . . . . . . . 11
7 Pin Connections . . . . . . . . . . . . . . . . . . . . . . 14
8 Applications Information . . . . . . . . . . . . . . . 17
9 Packaging Information . . . . . . . . . . . . . . . . . 21
MC13192/D
Rev. 2.7, 12/2004
Package
13192
QFN-32
13193
QFN-32

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Summary of Contents for Freescale Semiconductor MC13192

  • Page 1: Table Of Contents

    1 Introduction ......1 The MC13192 and MC13193 are short range, low 2 Features ......2 power, 2.4 GHz Industrial, Scientific, and Medical...
  • Page 2: Features

    ZigBee™ networking. For more detailed information about MC13192/MC13192 operation, refer to the MC13192/MC13193 Reference Manual, part number MC13192RM/D. Applications include, but are not limited to, the following: •...
  • Page 3: Block Diagrams

    4.1 Packet Structure Figure 5 shows the packet structure of the MC13192/MC13193. Payloads of up to 125 bytes are supported. The MC13192/MC13193 adds a four-byte preamble, a one-byte Start of Frame Delimiter (SFD), and a one-byte Frame Length Indicator (FLI) before the data. A Frame Check Sequence (FCS) is calculated and appended to the end of the data.
  • Page 4 64 µs period after the packet preamble and stored in RAM. If the MC13192/MC13193 is in packet mode, the data is processed as an entire packet. The MCU is notified that an entire packet has been received via an interrupt.
  • Page 5 Data Transfer Modes 802.15.4 Accuracy and Range Requirements Input Pow er Level (dBm) Figure 2. Reported Power Level Versus Input Power for Energy Detect or Link Quality Indicator MC13192/MC13193 Technical Data, Rev. 2.7 Freescale Semiconductor...
  • Page 6 If the MC13192/MC13193 is in packet mode, data is processed as an entire packet. The data is first loaded into the TX buffer. The MCU then requests that the MC13192/MC13193 transmit the data. The MCU is notified via an interrupt when the whole packet has successfully been transmitted.
  • Page 7 Power Up Buffer RAM Regulators Management PHY Driver Figure 4. System Level Block Diagram 4 bytes 1 byte 1 byte 125 bytes maximum 2 bytes Preamble Payload Data Figure 5. MC13192/MC13193 Packet Structure MC13192/MC13193 Technical Data, Rev. 2.7 Freescale Semiconductor...
  • Page 8: Electrical Characteristics

    Logic Input Voltage Low DDINT Logic Input Voltage High DDINT DDINT SPI Clock Rate RF Input Power Crystal Reference Oscillator Frequency (±40 ppm over 16 MHz Only operating conditions to meet the 802.15.4 standard.) MC13192/MC13193 Technical Data, Rev. 2.7 Freescale Semiconductor...
  • Page 9 Adjacent Channel Interference for 1% PER (desired signal -82 dBm) Alternate Channel Interference for 1% PER (desired signal -82 dBm) Frequency Error Tolerance (total) ± 100 ± 175 Symbol Rate Error Tolerance ± 40 ± 70 MC13192/MC13193 Technical Data, Rev. 2.7 Freescale Semiconductor...
  • Page 10 Power Spectral Density (-40 to +85 °C) Relative limit Nominal Output Power (2405-2480 MHz with Register 12 set to {[default],BC}) Error Vector Magnitude Power Control Range (10dB steps) Over the Air Data Rate kbps Spurious Emissions 2nd Harmonic 3rd Harmonic MC13192/MC13193 Technical Data, Rev. 2.7 Freescale Semiconductor...
  • Page 11: Functional Description

    The host microcontroller directs the MC13192/MC13193, checks its status, and reads/writes data to the device through the 4-wire SPI port. The transceiver operates as a SPI slave device only. A transaction between the host and the MC13192/MC13193 occurs as multiple 8-bit bursts on the SPI. The SPI signals are: 1.
  • Page 12 Functional Description 4. Master In/Slave Out (MISO) - The MC13192/MC13193 presents data to the master on the MISO output. A typical interconnection to a microcontroller is shown in Figure MC13192/MC13193 MISO Shift Register MOSI Shift Register Sclk SPICLK Baud Rate...
  • Page 13 6.2.2 SPI Transaction Operation Although the SPI port of an MCU transfers data in bursts of 8 bits, the MC13192/MC13193 requires that a complete SPI transaction be framed by CE, and there will be three (3) or more bursts per transaction. The assertion of CE to low signals the start of a transaction.
  • Page 14: Pin Connections

    16.393+ kHz. SPICLK Digital Clock Input External clock input for the SPI interface. MOSI Digital Input Master Out/Slave In. Dedicated SPI data input. MISO Digital Output Master In/Slave Out. Dedicated SPI data output. MC13192/MC13193 Technical Data, Rev. 2.7 Freescale Semiconductor...
  • Page 15 Note: Do not load this pin by using it as load capacitor. a 16 MHz source. Measure 16 MHz output at Pin 15, CLKO, programmed for 16 MHz. See the MC13192/MC13193 Reference Manual for details. VDDLO2 Power Input LO2 VDD supply. Connect to VDDA externally.
  • Page 16 Pin Connections RFIN- GPIO6 RFIN+ GPIO5 VDDINT VDDD PAO+ MC13192/ PAO- MC13193 MISO GPIO4 MOSI Figure 9. Pin Connections (Top View) MC13192/MC13193 Technical Data, Rev. 2.7 Freescale Semiconductor...
  • Page 17: Applications Information

    Freescale has specified that a 16 MHz crystal with a <9 pF load capacitance is required. The MC13192/MC13193 does not contain a reference divider, so 16 MHz is the only frequency that can be used. A crystal requiring higher load capacitance is prohibited because a higher load on the amplifier circuit may compromise its performance.
  • Page 18: Design Example

    PAO+ and PAO- require connection to VDDA, the analog regulator output. This is accomplished through the baluns in the referenced design. The 16 MHz crystal should be mounted close to the MC13192/MC13193 because the crystal trim default assumes that the listed KDS Daishinku crystal (see Table 10) and the 6.8 pF load capacitors shown are...
  • Page 19 Applications Information Figure 10. MC13192/MC13193 Configured With an MCU MC13192/MC13193 Technical Data, Rev. 2.7 Freescale Semiconductor...
  • Page 20 Applications Information Table 9. MC13192/MC13193 to MCU Bill of Materials (BOM) Item Quantity Reference Part Manufacturer ANT1 F_Antenna Printed wire 1 µF C2, C3, C4 220 nF C5, C6 6.8 pF C7, C8, C9, C10, 10 pF 0.5 pF MC13192/MC13193 Freescale Semiconductor µPG2012TK-E2...
  • Page 21: Packaging Information

    DETAIL T DETAIL M DETAIL M BACKSIDE PIN 1 INDEX OPTION BACKSIDE PIN 1 INDEX OPTION BACKSIDE PIN 1 INDEX OPTION Figure 11. Outline Dimensions for QFN-32, 5x5 mm (Case 1311-03, Issue E) MC13192/MC13193 Technical Data, Rev. 2.7 Freescale Semiconductor...
  • Page 22 81-3-3440-3569 components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Freescale Semiconductor Asia/Pacific: product could create a situation where personal injury or death may occur. Should Buyer purchase Freescale Semiconductor Hong Kong Ltd.

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