Cray Y-MP Series Manuals

Manuals and User Guides for Cray Y-MP Series. We have 1 Cray Y-MP Series manual available for free PDF download: Theory Of Operation

Cray Y-MP Series Theory Of Operation

Cray Y-MP Series Theory Of Operation (236 pages)

Brand: Cray | Category: Desktop | Size: 8 MB

Table of Contents

Section 1

8
- Notational Conventions
  5
- Related Publications
  6
- Table of Contents
  8
- Appendix A - Engini
  9
- Warning and Control Systi<:.\1
  11
- 1- Cray Y-Mp Physical Of-Scription
  11
- Powersupplies
  14
- Logic Chassis
  14
- Cooling
  14
- Power Supplies
  14
- Figure 1-3. Power-Supply Configuration (Rear View)
  15
- Logic Chassis
  16
- Module Description
  17
- CPU Module
  24
- Figure 1-8. Memory Chip Group Layout
  24
- 2-Centralmemory
  33
- Overview
  33
  - Preliminary Information
    38
- Cpu Module
  45
  - Memory Module
    67
- Cpu Data Registers
  96
- Address Functional Units
  109
- Address Fcnctional Units
  109
Section 2

118
- Lospchannelpairs
  120
- LOSP Channel Signals
  121
  - Preliminary Information
    121
- LOSP Channel Errors
  126
- HISP Channel Signals
  127
- Data Transfer Signals
  128
- Initialization Signals
  128
- HISP Channel Errors
  131
- Vhisp Channels
  132
- VHISP Channel Signals
  133
- Input Transfer Signals
  136
- Output Transfer Signals
  136
- VHISP Channel Programming
  137
- VHISP Channel Errors
  139
- I/O Channel Memory Access
  140
- Channel Control Paths
  142
- Hardware Implementation
  142
- DA and DB Options
  143
- DC Option
  148
- DD Option
  150
- DE Option
  151
- HISP Address Channels
  154
- DJ Option
  155
- YR Option
  158
- Output Data Paths
  162
  - System Clock
    167
  - Option Descriptions
    167
- Clock Speed Select
  168
- L!-SYSTEMCLOCKMODULE
  168
- FAN-OUT Sche:vle
  170
- Forced 0 and 1 Fanouts
  170
- CLOCK .MODULE Tuni:\Ig
  172
Section 3

175
- Macrocellarrayoverview
  176
- The Mca2500Ecl Macrocell Array Layout
  176
- Major Cells
  178
- Clock Pulse Generator Cell
  179
- Macrocell Array Packaging
  181
- Macrocell Library Diagrams
  184
- Macrocell Library Table
  184
- Mca2500Ecl Macrocell Array Esd Sensitivity
  184
Section 4

208
- Appendix A - Engineering Documentation
  210
- Clock Period and Time Segments
  210
- Boolean
  211
- Cover Sheet
  211
- Boolean Equations
  213
- Option Design Change History
  213
- Option Pinouts
  214
- Module Board Layouts
  215
- Chip Map
  223
- Pcbd Documents
  223
- Connector Maps
  225
- Cpuchipmap
  225
- Load Charts
  226
- PCLDCPU Document
  227
- PCTAB Document
  228
- PCLD Documents
  230
- Subsection Data Documents
  233

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