Maxim Dallas DS87C530 Specification Sheet

Eprom/rom microcontroller with real-time clock

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FEATURES

80C52 Compatible

8051 Instruction-Set Compatible

Four 8-Bit I/O Ports

Three 16-Bit Timer/Counters

256 Bytes Scratchpad RAM

Large On-Chip Memory

16kB EPROM (OTP)

1kB Extra On-Chip SRAM for MOVX

ROMSIZE Features

Selects Effective On-Chip ROM Size from

0 to 16kB

Allows Access to Entire External Memory Map

Dynamically Adjustable by Software

Useful as Boot Block for External Flash

Nonvolatile Functions

On-Chip Real-Time Clock with Alarm Interrupt

Battery Backup Support of 1kB SRAM

High-Speed Architecture

4 Clocks/Machine Cycle (8051 = 12)

Runs DC to 33MHz Clock Rates

Single-Cycle Instruction in 121ns

Dual Data Pointer

Optional Variable Length MOVX to Access

Fast/Slow RAM /Peripherals

Power Management Mode

Programmable Clock Source Saves Power

Runs from (crystal/64) or (crystal/1024)

Provides Automatic Hardware and Software Exit

EMI Reduction Mode Disables ALE

Two Full-Duplex Hardware Serial Ports

High Integration Controller Includes:

Power-Fail Reset

Early-Warning Power-Fail Interrupt

Programmable Watchdog Timer

14 Total Interrupt Sources with Six External

Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device

may be simultaneously available through various sales channels. For information about device errata, click here: www.maxim-ic.com/errata.

DS87C530/DS83C530

EPROM/ROM Microcontrollers with

PIN CONFIGURATIONS

TOP VIEW

PLCC, WINDOWED CLCC

The High-Speed Microcontroller User's Guide must

be used in conjunction with this data sheet. Download it

at:

www.maxim-ic.com/microcontrollers

1 of 47

Real-Time Clock

DALLAS

DS87C530

DS83C530

DALLAS

DS87C530

DS83C530

TQFP

REV: 070505

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Page 1 14 Total Interrupt Sources with Six External Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device may be simultaneously available through various sales channels. For information about device errata, click here: www.maxim-ic.com/errata. DS87C530/DS83C530...
Page 2: Ordering Information
0°C to +70°C DS83C530-ENL -40°C to +85°C DS83C530-ENL+ -40°C to +85°C + Denotes a Pb-free/RoHS-compliant device. * The windowed ceramic LCC package is intrinsically Pb free. DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock MAX CLOCK SPEED PIN-PACKAGE (MHz) 52 PLCC 52 PLCC...
Page 3: Detailed Description
The DS83C530 is a factory mask ROM version of the DS87C530 designed for high-volume, cost- sensitive applications. It is identical in all respects to the DS87C530, except that the 16kB of EPROM is replaced by a user-supplied application program. All references to features of the DS87C530 will apply to the DS83C530, with the exception of EPROM-specific features where noted.
Page 4: Pin Description
Crystal Oscillator Pins. XTAL1 and XTAL2 provide support for parallel-resonant, AT-cut crystals. XTAL1 acts also as an input if there is an external clock source in place of a crystal. XTAL2 is the output of the crystal amplifier.
Page 5 P1.4 P1.5 P1.6 P1.7 DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock FUNCTION Program Store-Enable Output. This active-low signal is a chip enable for optional external ROM memory. PSEN provides an active-low pulse and is driven high when external ROM is not being accessed.
Page 6 14, 40, 33, 34, N.C. DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock FUNCTION Port 2 (A8–A15), I/O. Port 2 is a bidirectional I/O port. The reset condition of Port 2 is logic high. In this state, a weak pullup holds the port high. This condition also serves as an input mode, since any external circuit that writes to the port will overcome the weak pullup.
Page 7: Performance Overview
DS87C530/DS83C530. The exception is critical timing since the high-speed microcontrollers perform its instructions much faster than the original for any given crystal selection. The DS87C530/DS83C530 run the standard 8051 instruction set. They are not pin compatible with other 8051s due to the timekeeping crystal.
Page 8: Special Function Registers
24 oscillator cycles. Therefore, they required the same amount of time. In the DS87C530/DS83C530, the MOVX instruction takes as little as two machine cycles or eight oscillator cycles but the “MOV direct, direct” uses three machine cycles or 12 oscillator cycles. While both are faster than their original counterparts, they now have different execution times.
Page 9 SCON1 SM1_1 SM0/FE_1 SBUF1 — — ROMSIZE STATUS T2CON EXF2 T2MOD — — RCAP2L RCAP2H DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock BIT 5 BIT 4 BIT 3 BIT 2 P0.5 P0.4 P0.3 P0.2 — — GATE C/ T P1.5 P1.4 P1.3...
Page 10: Real Time Clock
RTCD1 NONVOLATILE FUNCTIONS The DS87C530/DS83C530 provide two functions that are permanently powered if a user supplies an external energy source. These are an on-chip RTC and a nonvolatile SRAM. The chip contains all related functions and controls. The user must supply a backup source and a 32.768kHz timekeeping crystal.
Page 11: Nonvolatile Ram
The following describes guidelines for choosing these devices. Timekeeping Crystal The DS87C530/DS83C530 can use a standard 32.768kHz crystal as the RTC time base. There are two versions of standard crystals available, with 6pF and 12.5pF load capacitance. The tradeoff is that the 6pF uses less power, giving longer life while V is off, but is more sensitive to noise and board layout.
Page 12: Memory Resources
Figure 3. Internal Backup Circuit IMPORTANT APPLICATION NOTE The pins on the DS87C530/DS83C530 are generally as resilient as other CMOS circuits. They have no unusual susceptibility to electrostatic discharge (ESD) or other electrical transients. However, no pin on the DS87C530/DS83C530 should ever be taken to a voltage below ground. Negative voltages on any pin can turn on internal parasitic diodes that draw current directly from the battery.
Page 13: Program Memory Access
On-chip ROM begins at address 0000h and is contiguous through 3FFFh (16kB). Exceeding the maximum address of on-chip ROM will cause the DS87C530/DS83C530 to access off-chip memory. However, the maximum on-chip decoded address is selectable by software using the ROMSIZE feature.
Page 14: Data Memory Access
0000h and FFFFh goes to the expanded bus on Ports 0 and 2. This also is the default condition. This default allows the DS87C530/DS83C530 to drop into an existing system that uses these addresses for other hardware and still have full compatibility.
Page 15 SRAM. STRETCH MEMORY CYCLE The DS87C530/DS83C530 allow software to adjust the speed of off-chip data memory access. The microcontrollers can perform the MOVX in as few as two instruction cycles. The on-chip SRAM uses this speed and any MOVX instruction directed internally uses two cycles. However, the time can be stretched for interface to external devices.
Page 16 8051 DPTR is a 16-bit value that is used to address off-chip data RAM or peripherals. In the DS87C530/DS83C530, the standard data pointer is called DPTR, located at SFR addresses 82h and 83h. These are the standard locations. Using DPTR requires no modification of standard code. The new DPTR at SFR 84h and 85h is called DPTR1.
Page 17: Power Management
Power Management Mode offers a complete scheme of reduced internal clock speeds that allow the CPU to run software but to use substantially less power. During default operation, the DS87C530/DS83C530 use four clocks per machine cycle. Thus the instruction cycle rate is (Clock/4). At 33MHz crystal speed, the instruction cycle speed is 8.25MHz (33/4).
Page 18: Pmm Operation
A major component of power consumption in PMM is the crystal amplifier circuit. The DS87C530/DS83C530 allow the user to switch CPU operation to an internal ring oscillator and turn off the crystal amplifier. The CPU would then have a clock source of approximately 2MHz to 4MHz, divided by either 4, 64, or 1024.
Page 19 DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock Switchback To return to a 4-clock rate from PMM, software can simply select the CD1 and CD0 clock control bits to the 4 clocks per cycle state. However, the DS87C530/DS83C530 provide several hardware alternatives for automatic Switchback.
Page 20 DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock Crystal/Ring Operation The DS87C530/DS83C530 allow software to choose the clock source as an independent selection from the instruction cycle rate. The user can select crystal-based or ring oscillator-based operation under software control. Power-on reset default is the crystal (or external clock) source. The ring may save power depending on the actual crystal speed.
Page 21 SPTA0 STATUS.1 Status. Serial transmission on serial port 0. SPRA0 STATUS.0 Status. Serial word reception on serial port 0. DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock FUNCTION 21 of 47 RESET WRITE ACCESS 0 to 1 only when XTUP = 1 and...
Page 22 DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock Figure 5. Invoking and Clearing PMM 22 of 47...
Page 23: Idle Mode
Running from the ring, the user can perform a simple operation and return to sleep before the crystal has even started. If a user selects the ring to provide the startup clock and the processor remains running, hardware will automatically switch to the crystal once a power-on reset interval (65,536 clocks) has expired.
Page 24 One of the major contributors to radiated noise in an 8051-based system is the toggling of ALE. The DS87C530/DS83C530 allow software to disable ALE when not used by setting the ALEOFF (PMR.2) bit to 1. When ALEOFF = 1, ALE will still toggle during an off-chip MOVX. However, ALE will remain in a static when performing on-chip memory access.
Page 25 CKCON bit is logic 1, the DS87C530/DS83C530 use 4 clocks per cycle to generate timer speeds. When the bit is a 0, the DS87C530 uses 12 clocks for timer speeds. The reset condition is a 0. CKCON.5 selects the speed of Timer 2. CKCON.4 selects Timer 1 and CKCON.3 selects Timer 0.
Page 26: Watchdog Timer
(BGS) is set, a PFI will bring the device out of Stop mode. WATCHDOG TIMER To prevent software from losing control, the DS87C530/DS83C530 include a programmable watchdog timer. The Watchdog is a free-running timer that sets a flag if allowed to reach a preselected timeout. It can be (re)started by software.
Page 27 Watchdog Interrupt using EWDI (EIE.4). INTERRUPTS The DS87C530/DS83C530 provide 14 interrupt sources with three priority levels. The Power-Fail Interrupt (PFI) has the highest priority. Software can assign high or low priority to other sources. All interrupts that are new to the 8051 family, except for the PFI, have a lower natural priority than the originals.
Page 28: Eprom Programming
RTCC.0 EPROM PROGRAMMING The DS87C530 follows standards for a 16kB EPROM version in the 8051 family. It is available in a UV erasable, ceramic windowed package and in plastic packages for one-time user-programmable versions. The part has unique signature information so programmers can support its specific EPROM options.
Page 29 DS87C530 SECURITY OPTIONS The DS87C530 employs a standard three-level lock that restricts viewing of the EPROM contents. A 64- byte Encryption Array allows the authorized user to verify memory by presenting the data in encrypted form. Lock Bits The security lock consists of 3 lock bits. These bits select a total of 4 levels of security. Higher levels provide increasing security but also limit application flexibility.
Page 30 Register Address FCh Read Signature or Option Registers 30, 31, 60, FCh PL indicates pulse to a logic low. Table 10. EPROM Lock Bits LOCK BITS LEVEL DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock PSEN ALE/PROG EA/VPP 12.75V 12.75V 12.75V 12.75V 12.75V...
Page 31: Security Options
DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock Figure 7. EPROM Programming Configuration ROM-SPECIFIC FEATURES (DS83C530) The DS83C530 supports a subset of the EPROM features found on the DS87C530. SECURITY OPTIONS Lock Bits The DS83C530 employs a lock that restricts viewing of the ROM contents. When set, the lock will prevent MOVC instructions in external memory from reading program bytes in internal memory.
Page 32 30h, 31h, and 60h. Because Mask ROM devices are not programmed in device programmers, most designers will find little use for the feature, and it is included only for compatibility. ADDRESS DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock VALUE MEANING...
Page 33: Absolute Maximum Ratings
Output High Voltage Port 0 in Bus Mode = -8mA Input Low Current Ports 1, 2, 3 at 0.45V Transition Current from 1 to 0 Ports 1, 2, 3 at 2V DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock SYMBOL 4.25 Idle...
Page 34 . This condition mimics operation of pins in I/O mode. Port 0 is tri-stated in reset and when at a logic high state during I/O mode. Note 9: During a 0-to-1 transition, a one-shot drives the ports hard for two clock cycles. This measurement reflects port in transition mode. Note 10: When addressing external memory.
Page 35 ALE timing will change in relation to duty cycle variation. Note 2: Address is driven strongly until ALE falls, and is then held in a weak latch until overdriven externally. DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock 33MHz SYMBOL CLCL...
Page 36 RD or WR High to ALE High Note 1: is a time period related to the Stretch memory cycle selection. The following table shows the value of t selection. DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock VARIABLE CLOCK SYMBOL 1.5t CLCL...
Page 37 Clock Rising Input Data Hold after XHDX Clock Rising Clock Rising Edge to XHDV Input Data Valid DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock MOVX CYCLES 2 machine cycles 3 machine cycles (default) 4 machine cycles 5 machine cycles 6 machine cycles...
Page 38 Address to Data Valid Enable Low to Data Valid Data Float after Enable High to PROG PROG Note 1: All voltages are referenced to ground. DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock Instruction PSEN Output data RD signal Valid SYMBOL SYMBOL 12.5...
Page 39 DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock EXTERNAL PROGRAM MEMORY READ CYCLE EXTERNAL DATA MEMORY READ CYCLE VALL2 39 of 47...
Page 40 DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock DATA MEMORY WRITE CYCLE AVLL2 DATA MEMORY WRITE WITH STRETCH = 1 40 of 47...
Page 41 DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock DATA MEMORY WRITE WITH STRETCH = 2 EXTERNAL CLOCK DRIVE 41 of 47...
Page 42 DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock SERIAL PORT MODE 0 TIMING 42 of 47...
Page 43 DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock POWER-CYCLE TIMING EPROM PROGRAMMING AND VERIFICATION WAVEFORMS 43 of 47...
Page 44: Package Information
DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock PACKAGE INFORMATION (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/DallasPackInfo.) 44 of 47...
Page 45 DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock PACKAGE INFORMATION (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/DallasPackInfo.) 45 of 47...
Page 46 52-PIN — — 0.05 0.10 0.95 1.00 0.25 0.32 0.09 — 11.80 12.00 10.00 BSC 11.80 12.00 10.00 BSC 0.65 BSC 0.45 0.60 DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock 1.20 0.15 1.05 0.40 0.20 12.20 12.20 0.75 46 of 47...
Page 47 M a x i m I n t e g r a t e d P r o d u c t s , 1 2 0 S a n G a b r i e l D r i v e , S u n n y v a l e , C A 9 4 0 8 6 4 0 8 - 7 3 7 - 7 6 0 0 The Maxim logo is a registered trademark of Maxim Integrated Products, Inc. The Dallas logo is a registered trademark of Dallas Semiconductor Corporation.

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