Overall Block Diagram - Sony HDR-CX720V Service Manual

4-1. OVERALL BLOCK DIAGRAM (1/5)

CM-121 BOARD
CN6701
46,43,40,
DOAP - DOJP,
37,34,28,
DOAM - DOJM
25,22,19,
LENS BLOCK (1/2) 16,45,42,
IC6701
39,36,33,
27,24,21,
IRIS
CMOS
18,15
(SHUTTER)
IMAGER
DCKP,DCKM
31,30
XVS
J1 12
XHS
H1 11
SDI,SDO,XCE,SCK 10,8,
9,6
INCK
J2 2
XCLR
4
D2
IC4302
DC/DC CONVERTER,
LANC DRIVER
(8/10)
IC4301
DC/DC CONVERTER
(8/10)
F1401
Q1407,Q1408
CN1009
SYSTEM
HDMI
SDA, SCL
CEC
14
Q1403
HPD
19
LEVEL SHIFT
BUILT-IN
USB CABLE
CN9101
USB_D±_STD_CN
CHARGE
CN9102
USB_D±
USB_ID2
4
USB_VCC
(USB)
1
: VIDEO SIGNAL
: AUDIO SIGNAL
: VIDEO/AUDIO SIGNAL
08
HDR-CX720V/CX730E/CX740VE/CX760E/CX760V/PJ710/PJ710V/PJ710VE/PJ720E/PJ740VE/PJ760/PJ760E/PJ760V/ PJ760VE_L3
( ) : Number in parenthesis ( ) indicates the division number of schematic diagram where the component is located.
VC-658 BOARD (1/3)
CN1004
45,42,39,
36,33,27,
24,21,18, SUBL_DINN1-DINN10/DINP1-DINP10
15,46,43,
40,37,34,
28,25,22,
19,16
SUBL_CLKINN/CLKINP
31,30
SENS_VD
12 AC30
SENS_HD
11 AC29
10,8, SENSSI/SENSSO/SENSXCS/SENSSCK
9,6
CLK_CMOS_IN_IMG
2
XFLASH_RST
AV SIGNAL PROCESS,
4
AK28
CAMERA DSP,
LENS CONTROL,
MODE CONTROL,
HDMI PROCESS
CLK_CMOS_IN_GEN
IC1302
(2/10 - 4/10)
4
CLK_SYS_IN
CLOCK
1 AF2
CLK_CMOS_IN
GENERATOR
3 AD30
(2/10)
X1302
60MHz
LANC_SIG
FR_XRESET
E5
LANC_IN/OUT XFLASH_RST
B8
XSYS_RST
FR_EVER_SO/SCK
A8
XCS_FRONT
IC4801
XRESET_REQ
(1/2)
XPWR_OFF
HI CONTROL,
LANC INTERFACE FR_SI/SO/SCK
FR_EVER_SI/SO/SCK
(9/10)
XEVF_SW
L2
X4801
SYSTEM_AD 32.768kHz
L3
SYSAD_SEL_1
XSYSAD_SEL_2
AD
HDMI_TX0SOP-TX2SOP, HDMI_TX0SON-TX2SON
HDMI_TXCN/TXCP
Q1302
SDA, SCL
LEVEL SHIFT
Q1301
CEC
LEVEL SHIFT
HDMI_JACK_IN
IC9101
USB POWER
MANAGEMENT
(10/10)
IC9103
USB SWITCH
USB_DP/DM
(10/10)
USB_SEL USB_SEL
USB_ID2
USB_SEL
IC9104
USB_ID
USB SWITCH
USB_VBUS
(10/10)
4. BLOCK DIAGRAMS
LCD_R_0 - LCD_R_7
LCD_G_0 - LCD_G_7
LCD_B_0 - LCD_B_7
LCD_XVD
W2
IC1301 LCD_XHD
W1
(1/3)
LCD_CLK
LCD_DATEN
CPU,
Q3301
XPANEL_EVF_PS_
IC_1301
PANEL_NOR/REV
XPJ_RESET
XCS_LCD
XBB_RST
AV_SO/SCK
I2C_SDA/SCK
TP_X/Y/SEL1
XPJ_PARK
PJ_TEMP_AD
SDO
XCS_EVF
XCS_IC_2801
DAC_IOUT_Y
DAC_IOUT_PB
MIC_PWR_ON
MIC_JACK_IN
HP_JACK_IN
LANC_SIG
6 OVERALL (4/5)
(PAGE 4-4)
XSTRB_FULL
STROBE_ON
JACK_AD
4-1
D0 ± - D2 ±, CLK ±
IC3301
LCD SERIAL
INTERFACE
TRANSMITTER
IC4303
(7/10)
BL_H/L
BL DRIVE
(8/10)
XPANEL_EVF_PS
BEEP_PWM_P_A
SP_R ±
XSYS_RST
32
IC2701
SP_L ±
SDO
D/A
CONVERTER,
BCK_CN, MCK_CN, LRCK_OUT
SPEAKER AMP
I2C_SDA/SCK
(5/10)
XSYS_RST
XSYS_RST
D1
AV_SO/SCK
BCK_OUT, MCK_INOUT, LRCK_OUT
IC3001
MISO_SDA
AUDIO DSP
XCS_MAGIC
(6/10)
XBUSY_HS0_MAGIC
XINT_HS1_MAGIC
SDI0_MAG
SDI1_SPDIF_IN_MAG
EVF Model
LCD_B_0 - LCD_B_7
XPANEL_EVF_PS
MCK_CN, LRCK_OUT, BCK_CN
SDI0_SPDIF_IN_MAG
OVERALL (4/5) 4
(PAGE 4-4)
CN1006 (1/2)
5,3,
15,13,
19,17,
1
9,7
PANEL_NOR/REV
30
XPJ_RESET
OVERALL (2/5)
32
(PAGE 4-2)
I2C_SDA
31
SP_R ±
23,22
CN1005 (1/2)
XCS_LCD
23
XBB_RST
28
AV_SO/SCK
24,26
I2C_SCK
3
2
TP_X/Y/SEL1 21,20,
15
BL_H/L OVERALL (2/5)
18,19
(PAGE 4-2)
XPJ_PARK
22
PJ_TEMP_AD
27
SP_L ±
30,31
5
OVERALL (5/5)
(PAGE 4-5)
CN1003
18-25
LCD_XVD
28
LCD_XHD
29
EVF_CLK_OUT
31
XCS_EVF
14
XBB_RST
33
AV_SO/SCK
15,16
27
I2C_SDA/SCK
12,13
XSYS_RST
53
FR_XRESET
57
XCS_IC_2801
3
52
DAC_IOUT_Y
60
DAC_IOUT_PB
OVERALL (3/5)
59
SDO
(PAGE 4-3)
46
49-51
48
SDI1_MAG
47
MIC_PWR_ON
36
MIC_JACK_IN
37
HP_JACK_IN
38
SHOE_MIC_FL
40
SHOE_MIC_FR
41
XSTRB_FULL
10
STROBE_ON
11
LANC_SIG
56
JACK_AD
55
XEVF_SW
34