Sanyo VPC-E10 Service Manual page 4

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3. IC905 (H Driver) and IC901 (V Driver)
An H driver and V driver are necessary in order to generate
the clocks (vertical transfer clock, horizontal transfer clock and
electronic shutter clock) which driver the CCD. IC901 is a V
driver, and the XV1-XV15 signals which are output from IC101
are the vertical transfer clocks, and the XSG signal which are
output is superimposed at IC901 in order to generate a ter-
nary pulse. In addition, the XSUB signal which is output from
IC101 is used as the sweep pulse for the electronic shutter. H
driver has inside IC905 and generate H1, H2, H3 and RG
clock at IC905.
VH
V1X-10X
V11X-V15X,
V18X
VH11AX-
VH15AX,
V18AX
V16X-V17X
VH16AX-
VH17AX
VH16BX-
VH17BX
OFDX
Fig. 1-3. IC901 Block Diagram
VL
VDD GND
GND
V1-V10
VL
VH
GND
V11A-V15A,
MIX
V18A
VL
VH
GND
V16A-V17A
MIX
VL
VH
GND
V16B-V17B
MIX
VL
VH
POFD
VL
4. IC905 (CDS, AGC Circuit and A/D Converter)
The video signal which is output from the CCD is input to pins
(25) of IC905. There are inside the sampling hold block, AGC
block and A/D converter block. Settings of sampling phase
and AGC amplifier is carried out by serial data of pins (32),
(33) and (34). The video signal is converted A/D converter,
and output to LVDS.
-3, 0, +3, +6dB
CCDINP
CDS
CCDINM
3V INPUT
LDO
REG
1.8V OUTPUT
RG
HORIZONTAL
HL
DRIVERS
4
H1 TO H4
GP01
GP02
Fig. 1-4. IC905 Block Diagram
– 4 –
REFT
REFB
ADDI7000
VREF
6~42 dB
12-BIT
REDUCED
VGA
ADC
RANGE
LVDS
OUTPUT
CLAMP
INTERNAL
CLOCKS
PRECISION
INTERNAL
TIMING
REGISTERS
GENERATOR
TG CORE
HD
VD
CLI
TCLKP
TCLKN
DOUT0P
DOUT0N
DOUT1P
DOUT1N
SL
SCK
SDATA

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