Lpx+ Main Logic Board Jumper Settings - DEC DECpc LPx Service Maintenance Manual

Digital DECpc LPx/LPx+

LPx+ Main Logic Board Jumper Settings

Settings shown in bold italics are factory defaults.
Feature
Password clear (MFG testing)
Video display type
CPU clock input
Cache size select
Factory setting
VL bus write wait state
CPU type
Reset switch
RDY signal type
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Description
Normal
(1)
Password clear (MFG test)
Mono monitor
Color monitor
50 MHz
40 MHz
33 MHz
25 MHz
0 KB
128 KB
256 KB
Enabled
Zero wait write
One wait write
P24T,P24D
SX,DX
Enable
Disable
VLRDY->CPURDY (VL bus
ready connects to CPU bus
ready)
VLRDY->LRDY (VL bus ready
synchronized through chipset
Service Procedures
Setting
J15, open
J15, jumpered
J14, open
J14, jumpered
J1, open
J2, open
J3, open
J1, jumpered
J2, open
J3, open
J1, jumpered
J2, open
J3, jumpered
J1, open
J2, jumpered
J3, jumpered
J4, open
J5, open
J6, open
J7, open
J4, pins 1 and 2 jumpered
J5, pins 1 and 2 jumpered
J6, pins 1 and 2 jumpered
J7, pins 1 and 2 jumpered
J4, pins 2 and 3 jumpered
J5, pins 2 and 3 jumpered
J6, pins 2 and 3 jumpered
J7, pins 2 and 3 jumpered
J36, jumpered
J28, pins 1 and 2 jumpered
J28, pins 2 and 3, jumpered
J35, pins 1 and 2 jumpered
J35, pins 2 and 3 jumpered
J24, jumpered
J24, open
J44, pins 1 and 2 jumpered
J44, pins 2 and 3 jumpered
43