STMicroelectronics switch/hub Brochure page 6

Excellent Memory Management
Excellent Memory Management
• Built-in Address Decoding PLD
– Map any µPSD memory sector to any address
– Easily convert existing 8051 designs into µPSD
– Total memory mapping flexibility for new designs
• Memory Paging is Easy using Decode PLD
– Break traditional 8051 64K Byte address limit imposed by only 16 address lines
– 8-bit page register is built into Decode PLD ... it's like having 8 more address lines
– Paging (or banking) is directly supported by most 8051 C compilers
FFFF
Page 0 Page 0
32K Main
32K Main
Flash
Flash
64K
0000
www.st.com/micropsd
8032
8032
8032
MCU
MCU
MCU
Page 1
Page 1 Page 2
Page 2
32K Main
32K Main
32K Main 32K Main
Flash Flash
Flash
Flash
Common to All Pages
Map here: SRAM, 2
Sector
Selects
Page
Register
DECODE DECODE
DECODE
PLD PLD
PLD
Address
Sector
Selects
Page 3
Page 3
32K Main 32K Main
Flash
Flash
nd
Flash, I/O, etc
1
SRAM SRAM
SRAM
Sector
8 8
MAIN FLASH MAIN FLASH MAIN FLASH MAIN FLASH MAIN FLASH MAIN FLASH
MAIN FLASH MAIN FLASH MAIN FLASH
Sectors Sectors
4 4
nd nd nd nd nd nd
2 2 2 2 2 2 FLASH FLASH FLASH FLASH FLASH FLASH
nd nd nd
2 2 2 FLASH FLASH FLASH
Sectors Sectors
Page 7
Page 7
32K Main
32K Main
Flash Flash
6