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REVISIONS
GSM SERVICE SUPPORT GROUP
07.01.01
Level 3 PDA Block Diagram
Rev. 1.1
Dualband TaiChi+ (GPRS)
8464737E01_
Rev. O
Michael Hansen, Ralf Lorenzen-Scheil, Ray Collins
Page 3
B9
PDA_RW*
B10
PDA_OE*
D1
BACKLIGHT
M2
PEN_IRQ*
L3
WD_INT*
PB5
L5
DW_INT*
KBC2
DB*_RESET
RESET*_PDA
A11
PB11
To AL Block
RESET_*PDA
From AL Block
SPEAK_TP915
PWM_OUT
Q9809
LCD (0:3)
A
Q9801
PDA_VCC
U9821
V1
PDA_VCC
From AL Block
To AL Block
UPLINK
DOWNLINK
RTS2*
U2601
UPLINK_GCAP
U2601
U2601
DATA BUS (0:15)
ADDRESS BUS (0:19)
CSA1*ROM
SDCSO
SDRAS
SDCAS
SDCE
CSAO*ROM
SDWE
J12
J11
L12
M12
K11
L11
D10
SYSTEM
PORT B
INTERGRATION
MODULE
DRAM-CONTROLLER
CHIP-SELECT
8 / 16 BIT
68000 BUS
INTERFACE
68EC000 HCMOS
U2000
STATIC CORE
CLOCK
DRAGONBALL
SYNTHESISER
AND
POWER
CONTROL
REALTIME
CLOCK
SERIAL
LCD
PERIPHERAL
PWM
CONTROLLER
INTERRUPT
INTERFACE
CONTROLLER
PROCESSOR
PORTS C & F
PORT E
PORT B
CONTROL
F4
M3 M7
M6
L8
L7 K8
F3
D11
E1
E2
F2
L10
PWM_OUT
To / From W/CAP
PC_TXD
PC_RXD
FROM AL BLOCK
ALRT_VCC
SECOND_VCC
PDA_VCC
10
4, 5, 6
2
U9824
Q9800
3
1
CTS2*
U2601
SPM_CLK
TOUCH_CS*
DOWNLINK_GCAP
SPM_TXD
V2
SPM_RXD
A
U9822
PB2
PEN_IRQ*
DATA BUS (0:15)
ADDRESS BUS (0:19)
DQML
SDA10
DQMH
TOUCH_CS*
M10
PDA_VCC
A4, F5, E1, A5
PDA_OE*
F8
CSAO*_ROM
D7
PDA_RW
B3
TP918
DB_RESET
B4
16-BIT
U9801
TIMER
UART
WITH
INFRA-RED
SUPPORT
PORT E
SD_IrDA
J8
G1
G2
E4
E3
H3
H2
RTS1*
CTS1*
URXD UTXD
U_RTS U_CTS
CTS URTS_PA5
SD_IrDA PDA_VCC
To / From W/CAP
5
3, 8
IrDA_RXD
6
U9812
IrDA_TXD
IrDA Device
7
LCD (0:3)
EL+
RIGHT
2
16
TOP
5
15
LEFT
14
4
BOTTOM
U9808
12
3
A/D
PDA_VCC
11
9 & 10
PDA_VCC
A4, F5, E1, A5
PDA_OE*
F8
TP919
CSA1*_ROM
D7
PDA_RW
B3
DB_RESET
B4
U9816
EPROM
EPROM
DISP
LCD (0:3)
LOADSE
LLP
LOADCO
DFSEG
LACD
DFCOM
FRAME
LFRM
VD1
VD2
VM
VS12
VDD
VCC
VSS
EL+
SDA10
DQML
DQMH
PDA_VCC
SDCLK
38
SDCE
37
SDWE
16
SDCS0
19
SDRAS
18
SDCAS
17
U9810
SDRAM
J9805
RIGHT
1
TOP
2
LEFT
3
BOTTOM
4
5
6
7
8
9
10
CP
LCLK
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
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