JVC GR-DVA10 Technical Manual page 55

• • • • Deck CPU (IC1401: MN103004KRH) pin functions (2/5)
Pin No. Label
11 VDDB
37 DK(L)
24 RE(L)
38 WE1(L)
12 WE0(L)
40 PVDD
53 PVSS
56 MMOD1
54 MMOD0
55 RESET(L)
70 FRQS
71 VSS
69 EXMOD1
68 EXMOD0
72 OSCI
88 OSCO
86 VDDH
87 SYSCLK
85 EQ_CS
104 DV_CS
102 CS1(L)
103 CS0(L)
101 VDD
100 ODD_EVEN
84 V_PB_L
99 DV_RST
83 EQ_TRST
120 EQ_RST
118 VSS
119 HID_3
116 REC_I
117 PBH
134 REEL_LED
135 REC_SAFE
133 VDDH
136 CAM2
132 CAM1
148 CAM0
149 AVSS
152 -
150 -
151 -
147 -
Table 2-7-1 Deck CPU (IC1401: MN103004KRH) pin functions (2/5)
In/Out
- Power supply (REG_3V)
In Servo CPU ready signal (Low: Deck mode)
Out Read enable signal
- Test terminal (TL1401)
Out Write enable signal
- Power supply (REG_3V)
- GND
-
Control port for FLASH CPU
-
In Reset input (From SYSCON CPU: IC1001)
- L: fixed
- GND
- H: fixed
- H: fixed
In 27MHz clock input (Form TG/V.DRV: IC5501)
- Test terminal (TL1423)
- Power supply (REG_3V)
- Test terminal (TL1433)
Out Chip select signal (To DV_EQ: IC3201)
Out Chip select signal (To DECK_DSP: IC3001)
- Test terminal (TL1402)
- Test terminal (TL1403)
- Power supply (REG_3V)
Out Odd/Even field discrimination signal at slow playback (FRAME ADVANCE)
Out Video track area recording off signal
Out Reset signal output (To DECK_DSP: IC3001)
Out Reset signal output (To DV_EQ: IC3201) (For Boundary scan)
Out Reset signal output (To DV_EQ: IC3201)
- GND
Out Head switch pulse (control of recording current measure circuit)
Out ON/OFF control for recording circuit (To PRE/REC IC)
Out ON/OFF control for playback circuit (To PRE/REC IC)
Out Reel sensor LED control
In REC safety switch
- Power supply (REG_3V)
In Mechanism position detect from rotary encoder
- GND
- Not used
Description
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